Datasheet > 54165DMQB

54165DMQB

更新时间： 2024-11-21 20:25:11

品牌	Logo	应用领域
罗彻斯特 - ROCHESTER		/
页数	文件大小	规格书
7页	136K
描述
Parallel In Serial Out, TTL/H/L Series, 8-Bit, Right Direction, Complementary Output, TTL, CDIP16, CERAMIC, DIP-16

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54165DMQB 技术参数

生命周期：	Contact Manufacturer	包装说明：	DIP,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.72	Is Samacsys：	N
Base Number Matches：	1

54165DMQB 数据手册

August 1989

54165/DM74165

8-Bit Parallel-to-Serial Converter

General Description

The ’165 is an 8-bit parallel load or serial-in register with

complementary outputs available from the last stage. Paral-

lel inputting occurs asynchronously when the Parallel Load

(PL) input is LOW. With PL HIGH, serial shifting occurs on

the rising edge of the clock; new data enters via the Serial

Data (D ) input. The 2-input OR clock can be used to com-

bine two independent clock sources, or one input can act as

an active LOW clock enable.

Connection Diagram

Logic Symbol

Dual-In-Line-Package

TL/F/9782–2

Pin 16

GND

Pin 8

TL/F/9782–1

Order Number 54165DMQB, 54165FMQB or DM74165N

See NS Package Number J16A, N16E or W16A

Pin Names

Description

CP1, CP2

Clock Pulse Inputs (Active Rising Edge)

Serial Data Input

Asynchronous Parallel Load Input

(Active LOW)

P0–P7

Parallel Data Inputs

Serial Output from Last Stage

Complementary Output

1995 National Semiconductor Corporation

TL/F/9782

RRD-B30M115/Printed in U. S. A.

12 3 4 5 6 7

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