Datasheet > 5-330808-3

5-330808-3

更新时间： 2024-01-07 12:14:19

品牌	Logo	应用领域
亚德诺 - ADI		转换器
页数	文件大小	规格书
24页	776K
描述
14-Bit, 80 MSPS/105 MSPS A/D Converter

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技术参数
数据手册

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5-330808-3 技术参数

是否Rohs认证：	不符合	生命周期：	Active
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8536.69.40.40	风险等级：	5.71
联系完成配合：	NOT SPECIFIED	触点材料：	NOT SPECIFIED
设备插槽类型：	IC SOCKET	Base Number Matches：	1

5-330808-3 数据手册

AD6645

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

52 51 50 49 48 47 46 45 44 43 42 41 40

PIN 1

IDENTIFIER

GND

VREF

GND

D0 (LSB)

DMID

GND

ENCODE

GND

AD6645

TOP VIEW

(Not to Scale)

OVR

DNC

GND

AIN

GND

AIN

GND

14 15 16 17 18 19 20 21 22 23 24 25 26

NOTES

1. DNC = DO NOT CONNECT.

2. EXPOSED PAD. CONNECT THE EXPOSED PAD TO GND.

Figure 3. Pin Configuration

Table 7. Pin Function Descriptions

Pin Number

Mnemonic

DV_CC

GND

Description

1, 33, 43

3.3 V Power Supply (Digital) Output Stage Only.

Ground.

2, 4, 7, 10, 13, 1ꢀ, 17, 19, 21, 23, 2ꢀ,

27, 29, 34, 42

ꢀ

VREF

ENCODE

2.4 V Reference. Bypass to ground with a 0.1 μF microwave chip capacitor.

Encode Input. Conversion initiated on rising edge.

ENCODE

, Differential Input.

Complement of

8, 9, 14, 16, 18, 22, 26, 28, 30

AV_CC

AIN

ꢀ V Analog Power Supply.

Analog Input.

AIN

Complement of AIN, Differential Analog Input.

DNC

Internal Voltage Reference. Bypass to ground with a 0.1 μF chip capacitor.

Do not connect this pin.

3ꢀ

OVR

DMID

D0 (LSB)

D1 to Dꢀ, D6 to D12

D13 (MSB)

DRY

Overrange Bit. A logic level high indicates analog input exceeds FS.

Output Data Voltage Midpoint. Approximately equal to (DV_CC)/2.

Digital Output Bit (Least Significant Bit); Twos Complement.

Digital Output Bits in Twos Complement.

Digital Output Bit (Most Significant Bit); Twos Complement.

Data-Ready Output.

37 to 41, 44 to ꢀ0

ꢀ1

ꢀ2

ꢀ3 (EPAD)

Exposed Paddle (EPAD) Exposed Pad. Connect the exposed pad to GND.

Rev. D | Page 8 of 24

1...5 6 789 10 11...24

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