Datasheet > 4302-02

4302-02

更新时间： 2024-11-28 07:13:03

品牌	Logo	应用领域
PSEMI		衰减器
页数	文件大小	规格书
11页	458K
描述
50 Ohm RF Digital Attenuator 6-bit, 31.5 dB, DC-4.0 GHZ

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Product Specification

PE4302

50 Ω RF Digital Attenuator

6-bit, 31.5 dB, DC – 4.0 GHz

Product Description

Features

The PE4302 is a high linearity, 6-bit RF Digital Step Attenuator

“DSA” covering a 31.5 dB attenuation range in 0.5 dB steps.

This 50-ohm RF DSA provides both parallel and serial CMOS

control interface operates on a single 3-volt supply and

maintains high attenuation accuracy over frequency and

temperature. It also has a unique control interface that allows

the user to select an initial attenuation state at power-up. The

PE4302 exhibits very low insertion loss and low power

consumption. This functionality is delivered in a 4x4mm QFN

footprint.

• Attenuation: 0.5 dB steps to 31.5 dB

• Flexible parallel and serial programming

interfaces

• Unique power-up state selection

• Positive CMOS control logic

• High attenuation accuracy and linearity

over temperature and frequency

• Very low power consumption

• Single-supply operation

• 50 Ω impedance

The PE4302 is manufactured in Peregrine’s patented Ultra

Thin Silicon (UTSi®) CMOS process, offering the performance

of GaAs with the economy and integration of conventional

CMOS.

• Packaged in a 20 lead 4x4mm QFN

Figure 1. Functional Schematic Diagram

Figure 2. Package Type

4x4mm -20 Lead QFN

Switched Attenuator Array

RF Input

RF Output

Parallel Control

Serial Control

Control Logic Interface

Power-Up Control

Table 1. Electrical Specifications @ +25°C, V_DD= 3.0 V

Parameter

Test Conditions

Frequency

Minimum

Typical

Maximum

Units

MHz

Operation Frequency

Insertion Loss²

4000

DC - 2.2 GHz

DC ≤ 1.0 GHz

1.0 < 2.2 GHz

1 MHz - 2.2 GHz

1.5

1.75

±(0.10 + 3% of atten setting)

±(0.15 + 5% of atten setting)

Any Bit or Bit

Combination

Attenuation Accuracy

1 dB Compression³

Input IP3^1,2

dBm

Two-tone inputs

+18 dBm

1 MHz - 2.2 GHz

DC - 2.2 GHz

Return Loss

50% control to 0.5 dB

of final value

Switching Speed

µs

Notes: 1. Device Linearity will begin to degrade below 1 Mhz

2. See Max input rating in Table 2 & Figures on Pages 2 to 4 for data across frequency.

3. Note Absolute Maximum in Table 3.

Document No. 70/0056~02D │ www.psemi.com

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