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41210 PDF预览

41210

更新时间: 2024-11-25 06:27:03
品牌 Logo 应用领域
英特尔 - INTEL PC
页数 文件大小 规格书
52页 761K
描述
Intel 41210 Serial to Parallel PCI Bridge

41210 数据手册

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Intel® 41210 Serial to Parallel PCI Bridge  
Datasheet  
Product Features  
PCI Express Specification, Revision 1.0a  
2-level programmable round-robin internal  
arbiter with Multi-Transaction Timer  
(MTT)  
Support for single x8, single x4 or single x1  
PCI Express operation.  
External PCI clock-feed support for  
asynchronous primary and secondary  
domain operation.  
64-bit addressing support  
32-bit CRC (cyclic redundancy checking)  
covering all transmitted data packets.  
64-bit addressing for upstream and  
16-bit CRC on all link message  
downstream transactions  
information.  
Downstream LOCK# support.  
No upstream LOCK# support.  
PCI fast Back-to-Back capable as target.  
Raw bit-rate on the data pins of 2.5 Gbit/s,  
resulting in a raw bandwidth per pin of  
250 MB/s.  
Maximum realized bandwidth on PCI  
Express interface is 2 GB/s (in x8 mode) in  
each direction simultaneously, for an  
aggregate of 4 GB/s.  
Up to four active and four pending  
upstream memory read transactions  
Up to two downstream delayed (memory  
read, I/O read/write and configuration read/  
write) transaction.  
PCI Local Bus Specification, Revision 2.3.  
PCI-to-PCI Bridge Specification,  
Tunable inbound read prefetch algorithm  
Revision 1.1.  
for PCI MRM/MRL commands  
PCI-X Addendum to the PCI Local Bus  
Specification, Revision 1.0b  
Device hiding support for secondary PCI  
devices.  
64-bit 66 MHz, 3.3 V, NOT 5 V tolerant.  
Secondary bus Private Memory support via  
Opaque memory region  
On Die Termination (ODT) with 8.3KOhm  
pull-up to 3.3V for PCI signals.  
Local initialization via SMBus  
Six external REQ/GNT Pairs for internal  
Secondary side initialization via Type 0  
arbiter on segment A and B respectively.  
configuration cycles.  
Programmable bus parking on either the  
Full peer-to-peer read/write capability  
last agent or always on the 41210 Bridge  
between the two secondary PCI segments.  
Order Number: 278875-005US  
May 2005  

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