Datasheet > 3238-00

3238-00

更新时间： 2024-01-09 09:00:31

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描述
1500 MHz UltraCMOS? Integer-N PLL for Low Phase Noise Applications

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3238-00 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.82	Is Samacsys：	N
模拟集成电路 - 其他类型：	PHASE LOCKED LOOP	Base Number Matches：	1

3238-00 数据手册

PE3238

Product Specification

Table 2. Absolute Maximum Ratings

Table 4. ESD Ratings

Symbol

Parameter/Conditions

Level Units

Symbol

Parameter/Conditions Min Max Units

ESD voltage human body model

(Note 1)

V_DD

V_I

Supply voltage

-0.3

-10

-65

4.0

V_ESD

1000

V_DD

+ 0.3

Voltage on any input

DC into any input

DC into any output

Note 1: Periodically sampled, not 100% tested. Tested per MIL-

STD-883, M3015 C2

I_I

+10

150

°C

Electrostatic Discharge (ESD) Precautions

I_O

When handling this UltraCMOS™ device, observe

the same precautions that you would use with

other ESD-sensitive devices. Although this device

contains circuitry to protect it from damage due to

ESD, precautions should be taken to avoid

exceeding the specified rating in Table 4.

Storage temperature

range

T_stg

Table 3. Operating Ratings

Symbol

Parameter/Conditions Min Max Units

V_DD

Supply voltage

2.85

-40

3.15

Latch-Up Avoidance

Operating ambient

temperature range

T_A

°C

Unlike conventional CMOS devices, UltraCMOS™

devices are immune to latch-up.

Table 5. DC Characteristics: V_DD= 3.0 V, -40° C < T_A< 85° C, unless otherwise specified

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Operational supply current;

Prescaler enabled

I_DD

V_DD= 2.85 to 3.15 V

Digital Inputs: All except f_r, R₀, F_in, F_in

V_IH

V_IL

I_IH

High level input voltage

Low level input voltage

High level input current

Low level input current

V_DD= 2.85 to 3.15 V

V_IH= V_DD= 3.15 V

0.7 x V_DD

0.3 x V_DD

µA

I_IL

V_IL= 0, V_DD= 3.15 V

-1

Reference Divider input: f_r

I_IHRHigh level input current

I_ILRLow level input current

R0 Input (Pull-up Resistor): R₀

I_IHROHigh level input current

I_ILROLow level input current

Counter and phase detector outputs: f_c, f_p

V_IH= V_DD= 3.15 V

+100

µA

V_IL= 0, V_DD= 3.15 V

-100

V_IH= V_DD= 3.15 V

µA

V_IL= 0, V_DD= 3.15 V

-5

V_OLD

V_OHD

Output voltage LOW

Output voltage HIGH

I_out= 6 mA

I_out= -3 mA

0.4

V_DD- 0.4

Lock detect outputs: Cext, LD

V_OLC

V_OHC

V_OLLD

Output voltage LOW, Cext

I_out= 0.1 mA

I_out= -0.1 mA

I_out= 1 mA

0.4

Output voltage HIGH, Cext

Output voltage LOW, LD

V_DD- 0.4

Document No. 70-0031-03 │ www.psemi.com

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