2T13K33MDBVREPG4

更新时间： 2024-02-09 19:56:54

品牌	Logo	应用领域
德州仪器 - TI		监控
页数	文件大小	规格书
16页	452K
描述
PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG

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2T13K33MDBVREPG4 数据手册

TPS3813J25-EP, TPS3813L30-EP

TPS3813K33-EP, TPS3813I50-EP

www.ti.com

SGLS343A–MAY 2006–REVISED MAY 2006

PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG

FEATURES

APPLICATIONS

•

Applications Using DSPs, Microcontrollers,

or Microprocessors

•

Controlled Baseline

– One Assembly/Test Site, One Fabrication

Site

•

Safety Critical Systems

Automotive Systems

Healing Systems

•

Extended Temperature Performance of -55°C

to 125°C

Enhanced Diminishing Manufacturing

Sources (DMS) Support

TPS3813

DBV PACKAGE

(TOP VIEW)

•

Enhanced Product-Change Notification

(1)

Qualification Pedigree

RESET

WDR

WDI

Window-Watchdog With Programmable Delay

and Window Ratio

GND

•

6-Pin SOT-23 Package

WDT

Supply Current of 9 µA (Typ)

Power On Reset Generator With a Fixed

Delay Time of 25 ms

ACTUAL SIZE

3,00 mm x 3,00 mm

•

Precision Supply Voltage Monitor 2.5 V, 3 V,

3.3 V, 5 V

Open-Drain Reset Output

(1) Component qualification in accordance with JEDEC and

industry standards to ensure reliable operation over an

extended temperature range. This includes, but is not limited

to, Highly Accelerated Stress Test (HAST) or biased 85/85,

temperature cycle, autoclave or unbiased HAST,

electromigration, bond intermetallic life, and mold compound

life. Such qualification testing should not be viewed as

justifying use of this component beyond specified

performance and environmental limits.

DESCRIPTION

The TPS3813 family of supervisory circuits provides circuit initialization and timing supervision, primarily for

DSPs and processor-based systems.

During power on, RESET is asserted when supply voltage (V_DD) becomes higher than 1.1 V. Thereafter, the

supervisory circuit monitors V_DDand keeps RESET active as long as V_DDremains below the threshold voltage

(V_IT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset.

The delay time, t_d= 25 ms typical, starts after V_DDhas risen above the threshold voltage (V_IT). When the supply

voltage drops below the threshold voltage (V_IT), the output becomes active (low) again. No external components

are required. All the devices of this family have a fixed-sense threshold voltage (V_IT) set by an internal voltage

divider.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...16

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