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29704-BRF-003-A PDF预览

29704-BRF-003-A

更新时间: 2024-11-25 01:19:55
品牌 Logo 应用领域
泰科 - TE ATM异步传输模式
页数 文件大小 规格书
2页 366K
描述
OptiPHY F155 Quad OC-3/STM-1 ATM/POS PHY

29704-BRF-003-A 数据手册

 浏览型号29704-BRF-003-A的Datasheet PDF文件第2页 
OptiPHY F155 Quad OC-3/STM-1 ATM/POS PHY  
CX29704/2/1  
Four-Channel CX29704, two-channel  
CX29702, one-channel CX29701 155Mbps  
ATM/POS PHY with Clock and Data Recovery  
>
KEY FEATURES  
> Integrated clock and data  
recovery (CDR)  
> Synthesizes a 155 MHz Tx  
clock from a 19 MHz input  
> Clock recovery conforms  
to GR-253-CORE jitter  
requirements  
> UTOPIA Level 2 and POS  
Level 2 system interfaces  
The CX2970x is an integrated circuit that implements  
four-channel ATM/Packet over SONET/SDH (POS)  
processing functions at 155.52 Mbps. The device contains  
both the PMD and TC sublayers and features a UTOPIA  
Level 2 interface to the ATM layer or, optionally, a POS  
PHY Level 2 interface to the link layer. This device also  
includes dedicated serial ports for the insertion and  
extraction of the DCC overhead bytes.  
> Low-power, 3.3 V CMOS  
technology  
and stuffing/destuffing operations. Data is exchanged  
with higher-layer devices using a POS PHY Level 2 interface.  
SONET/SDH Processing  
In the transmit path, this device generates all section,  
line and path overhead bytes, in addition to implementing  
framing, scrambling and alarm indication functions. On the  
receive path, all framing, descrambling, alarm detection and  
pointer interpretations are performed. A serial interface  
inserts and extracts the section or line DCC bytes.  
Line Interface  
The CX2970x includes on-chip clock and data recovery  
(CDR) for 155.52 Mbps line rates. This CDR block also  
implements the serialize/deserialize functions. On  
the receive path, after recovery of the data and its  
associated clock, data is sent to the SONET/SDH  
framer via a parallel bus.  
ATM Cell Processing  
For ATM cell processing, the CX2970x performs all cell  
encapsulation, HEC calculation, cell delineation, payload  
scrambling/descrambling and idle cell insertion/filtering.  
Data is exchanged with a higher-layer device using a  
UTOPIA Level 2 interface.  
Higher-Layer Interface  
The CX2970x supports several interfaces to higher-  
layer devices. The component supports a UTOPIA Level  
2 interface for ATM cells and a POS PHY interface for  
PPP packets in POS mode. Up to eight CX2970x devices  
can be connected to a single higher-level device  
(multiport ATM-layer or POS-layer device),  
POS Processing  
In POS mode, the CX2970x performs all HDLC framing,  
scrambling/descrambling, interframe fills, FIFO management  
in various operation modes.  
>

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