Datasheet > 27LV25630IP

27LV25630IP

更新时间： 2022-01-19 11:34:00

品牌	Logo	应用领域
其他 - ETC		可编程只读存储器电动程控只读存储器
页数	文件大小	规格书
12页	125K
描述
x8 EPROM

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中文翻译

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27LV25630IP 数据手册

27LV256

1.3

Standby Mode

1.6

Verify

The standby mode is deﬁned when the CE pin is high

(VIH) and a program mode is not deﬁned. Output Dis-

able

After the array has been programmed it must be veri-

ﬁed to ensure that all the bits have been correctly pro-

grammed. This mode is entered when all of the

following conditions are met:

1.4

Output Enable

a) VCC is at the proper level

b) VPP is at the proper VH level

c) the CE pin is high

This feature eliminates bus contention in multiple bus

microprocessor systems and the outputs go to a high

impedance when the following condition is true:

d) the OE line is low

•

The OE pin is high and program mode is not

deﬁned.

1.7

Inhibit

When Programming multiple devices in parallel with dif-

ferent data, only CE needs to be under separate control

to each device. By pulsing the CE line low on a partic-

ular device, that device will be programmed, and all

other devices with CE held high will not be programmed

with the data although address and data are available

on their input pins.

1.5

Programming Mode

The Express algorithm has been developed to improve

on the programming throughput times in a production

environment. Up to 10 100-microsecond pulses are

applied until the byte is veriﬁed. No over-programming

is required. A ﬂowchart of the express algorithm is

shown in Figure 1.

1.8

Identity Mode

Programming takes place when:

In this mode speciﬁc data is outputted which identiﬁes

the manufacturer as Microchip Technology Inc. and

device type. This mode is entered when Pin A9 is taken

to VH (11.5V to 12.5V). The CE and OE lines must be

at VIL. A0 is used to access any of the two non-eras-

able bytes whose data appears on O0 through O7.

a) VCC is brought to the proper voltage

b) VPP is brought to the proper VH level

c) the OE pin is high

d) the CE pin is low

Since the erased state is “1” in the array, programming

of “0” is required. The address to be programmed is set

via pins A0-A14 and the data to be programmed is pre-

sented to pins O0-O7. When data and address are sta-

ble, a low-going pulse on the CE line programs that

location.

Identity

Input

Output

A0 0 O O O O O O O

Manufacturer

Device Type*

VIL

VIH

* Code subject to change.

DS11020G-page 6

1998 Microchip Technology Inc.

This Material Copyrighted by Its Respective Manufacturer

1...3 4 567 8 9...12

中文翻译

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与27LV25630IP相关器件

型号	品牌	获取价格	描述	数据表
27LV256-30IP	MICROCHIP	获取价格	256K (32K x 8) Low-Voltage CMOS EPROM
27LV25630ISO	ETC	获取价格	x8 EPROM
27LV256-30ISO	MICROCHIP	获取价格	256K (32K x 8) Low-Voltage CMOS EPROM
27LV256-30IVS	MICROCHIP	获取价格	256K (32K x 8) Low-Voltage CMOS EPROM
27LV25630L	ETC	获取价格	x8 EPROM
27LV256-30L	MICROCHIP	获取价格	256K (32K x 8) Low-Voltage CMOS EPROM
27LV25630P	ETC	获取价格	x8 EPROM
27LV256-30P	MICROCHIP	获取价格	256K (32K x 8) Low-Voltage CMOS EPROM
27LV25630SO	ETC	获取价格	x8 EPROM
27LV256-30SO	MICROCHIP	获取价格	256K (32K x 8) Low-Voltage CMOS EPROM

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