Datasheet > 存储 > EEPROM> 25AA128X-I/P

25AA128X-I/P

更新时间： 2024-02-16 03:04:51

品牌	Logo	应用领域
美国微芯 - MICROCHIP		存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数	文件大小	规格书
26页	400K
描述
128K SPI Bus Serial EEPROM

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

25AA128X-I/P 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	4.40 MM, PLASTIC, TSSOP-8	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.51	Factory Lead Time：	6 weeks
风险等级：	5.57	Is Samacsys：	N
最大时钟频率 (fCLK)：	10 MHz	数据保留时间-最小值：	200
耐久性：	1000000 Write/Erase Cycles	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3	长度：	4.4 mm
内存密度：	131072 bit	内存集成电路类型：	EEPROM
内存宽度：	8	湿度敏感等级：	1
功能数量：	1	端子数量：	8
字数：	16384 words	字数代码：	16000
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	16KX8
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TSSOP8,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	并行/串行：	SERIAL
峰值回流温度（摄氏度）：	260	电源：	2/5 V
认证状态：	Not Qualified	座面最大高度：	1.2 mm
串行总线类型：	SPI	最大待机电流：	0.000001 A
子类别：	EEPROMs	最大压摆率：	0.005 mA
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	1.8 V
标称供电电压 (Vsup)：	2.5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn) - annealed	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	40	宽度：	3 mm
最长写入周期时间 (tWC)：	5 ms	写保护：	HARDWARE/SOFTWARE
Base Number Matches：	1

25AA128X-I/P 数据手册

25AA128/25LC128

2.0

2.1

FUNCTIONAL DESCRIPTION

Principles of Operation

2.3

Write Sequence

The 25XX128 is a 16,384 byte Serial EEPROM

designed to interface directly with the Serial Peripheral

Interface (SPI) port of many of today’s popular

microcontroller families, including Microchip’s PIC^®

microcontrollers. It may also interface with microcon-

trollers that do not have a built-in SPI port by using dis-

crete I/O lines programmed properly in firmware to

match the SPI protocol.

Prior to any attempt to write data to the 25XX128, the

write enable latch must be set by issuing the WREN

instruction (Figure 2-4). This is done by setting CS low

and then clocking out the proper instruction into the

25XX128. After all eight bits of the instruction are

transmitted, the CS must be brought high to set the

write enable latch. If the write operation is initiated

immediately after the WREN instruction without CS

being brought high, the data will not be written to the

array because the write enable latch will not have been

properly set.

The 25XX128 contains an 8-bit instruction register. The

device is accessed via the SI pin, with data being

clocked in on the rising edge of SCK. The CS pin must

be low and the HOLD pin must be high for the entire

operation.

Once the write enable latch is set, the user may

proceed by setting the CS low, issuing a WRITE

instruction, followed by the 16-bit address, with two

MSBs of the address being “don’t care” bits, and then

the data to be written. Up to 64 bytes of data can be

sent to the device before a write cycle is necessary.

The only restriction is that all of the bytes must reside

in the same page.

Table 2-1 contains a list of the possible instruction

bytes and format for device operation. All instructions,

addresses and data are transferred MSB first, LSB last.

Data (SI) is sampled on the first rising edge of SCK

after CS goes low. If the clock line is shared with other

peripheral devices on the SPI bus, the user can assert

the HOLD input and place the 25XX128 in ‘HOLD’

mode. After releasing the HOLD pin, operation will

resume from the point when the HOLD was asserted.

Note:

Page write operations are limited to writing

bytes within a single physical page,

regardless of the number of bytes

actually being written. Physical page

boundaries start at addresses that are

integer multiples of the page buffer size (or

‘page size’) and, end at addresses that are

integer multiples of page size – 1. If a

Page Write command attempts to write

across a physical page boundary, the

result is that the data wraps around to the

beginning of the current page (overwriting

data previously stored there), instead of

being written to the next page as might be

expected. It is therefore necessary for the

application software to prevent page write

operations that would attempt to cross a

page boundary.

2.2

Read Sequence

The device is selected by pulling CS low. The 8-bit

READ instruction is transmitted to the 25XX128 fol-

lowed by the 16-bit address, with two MSBs of the

address being “don’t care” bits. After the correct READ

instruction and address are sent, the data stored in the

memory at the selected address is shifted out on the

SO pin. The data stored in the memory at the next

address can be read sequentially by continuing to pro-

vide clock pulses. The internal Address Pointer is auto-

matically incremented to the next higher address after

each byte of data is shifted out. When the highest

address is reached (3FFFh), the address counter rolls

over to address 0000h, allowing the read cycle to be

continued indefinitely. The read operation is terminated

by raising the CS pin (Figure 2-1).

For the data to be actually written to the array, the CS

must be brought high after the Least Significant bit (D0)

of the n^thdata byte has been clocked in. If CS is

brought high at any other time, the write operation will

not be completed. Refer to Figure 2-2 and Figure 2-3

for more detailed illustrations on the byte write

sequence and the page write sequence respectively.

While the write is in progress, the STATUS register may

be read to check the status of the WPEN, WIP, WEL,

BP1 and BP0 bits (Figure 2-6). A read attempt of a

memory array location will not be possible during a

write cycle. When the write cycle is completed, the

write enable latch is reset.

DS21831D-page 6

1...3 4 567 8 9...26

下载PDF

与25AA128X-I/P相关器件

型号	品牌	描述	获取价格	数据表
25AA128X-I/SM	MICROCHIP	16K X 8 SPI BUS SERIAL EEPROM, PDSO8, 5.28 MM, ROHS COMPLIANT, PLASTIC, SOIJ-8	获取价格
25AA128X-I/SN	MICROCHIP	128K SPI Bus Serial EEPROM	获取价格
25AA128X-I/ST	MICROCHIP	128K SPI Bus Serial EEPROM	获取价格
25AA128XT-E/MF	MICROCHIP	128K SPI Bus Serial EEPROM	获取价格
25AA128XT-E/P	MICROCHIP	128K SPI Bus Serial EEPROM	获取价格
25AA128XT-E/SN	MICROCHIP	128K SPI Bus Serial EEPROM	获取价格

产品中心

服务支持

精选活动

关于我们

帮助中心

25AA128X-I/P

25AA128X-I/P 技术参数

25AA128X-I/P 数据手册

与25AA128X-I/P相关器件

与25AA128X-I/P相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

25AA128X-I/P

25AA128X-I/P 技术参数

25AA128X-I/P 数据手册

与25AA128X-I/P相关器件

与25AA128X-I/P相关文章

您还可以找

您在本页遇到什么问题？