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25AA1024T-I/MFG

更新时间： 2024-02-26 15:17:53

品牌	Logo	应用领域
美国微芯 - MICROCHIP		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
34页	537K
描述
128K X 8 SPI BUS SERIAL EEPROM, PDSO8, 6 X 5 MM, PLASTIC, DFN-8

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25AA1024T-I/MFG 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOP, SOP8,.3	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.51	风险等级：	5.5
Is Samacsys：	N	最大时钟频率 (fCLK)：	20 MHz
耐久性：	100000 Write/Erase Cycles	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3	长度：	5.28 mm
内存密度：	1048576 bit	内存集成电路类型：	FLASH
内存宽度：	8	湿度敏感等级：	1
功能数量：	1	端子数量：	8
字数：	131072 words	字数代码：	128000
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	128KX8
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP8,.3	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	并行/串行：	SERIAL
峰值回流温度（摄氏度）：	260	电源：	2/5 V
编程电压：	1.8 V	认证状态：	Not Qualified
座面最大高度：	2.03 mm	串行总线类型：	SPI
最大待机电流：	0.000001 A	子类别：	Flash Memories
最大压摆率：	0.01 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	1.8 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	40
类型：	NOR TYPE	宽度：	5.21 mm
最长写入周期时间 (tWC)：	5 ms	写保护：	HARDWARE/SOFTWARE
Base Number Matches：	1

25AA1024T-I/MFG 数据手册

25AA1024

the data in the rest of the page is refreshed along with

the data bytes being written. For this reason,

endurance is specified per page.

2.2

Write Sequence

Prior to any attempt to write data to the 25AA1024, the

write enable latch must be set by issuing the WREN

instruction (Figure 2-4). This is done by setting CS low

and then clocking out the proper instruction into the

25AA1024. After all eight bits of the instruction are

transmitted, the CS must be brought high to set the

write enable latch. If the write operation is initiated

immediately after the WREN instruction without CS

being brought high, the data will not be written to the

array because the write enable latch will not have been

properly set.

Note:

Page write operations are limited to writing

bytes within a single physical page,

regardless of the number of bytes

actually being written. Physical page

boundaries start at addresses that are

integer multiples of the page buffer size (or

‘page size’), and end at addresses that are

integer multiples of page size – 1. If a

Page Write command attempts to write

across a physical page boundary, the

result is that the data wraps around to the

beginning of the current page (overwriting

data previously stored there), instead of

being written to the next page as might be

expected. It is therefore necessary for the

application software to prevent page write

operations that would attempt to cross a

page boundary.

A write sequence includes an automatic, self timed

erase cycle. It is not required to erase any portion of the

memory prior to issuing a Write command.

Once the write enable latch is set, the user may

proceed by setting the CS low, issuing a WRITEinstruc-

tion, followed by the 24-bit address, with seven MSBs

of the address being “don’t care” bits, and then the data

to be written. Up to 256 bytes of data can be sent to the

device before a write cycle is necessary. The only

restriction is that all of the bytes must reside in the

same page. When doing a write of less than 256 bytes

For the data to be actually written to the array, the CS

must be brought high after the Least Significant bit (D0)

of the n^thdata byte has been clocked in. If CS is

brought high at any other time, the write operation will

not be completed. Refer to Figure 2-2 and Figure 2-3

for more detailed illustrations on the byte write

sequence and the page write sequence, respectively.

While the write is in progress, the STATUS register may

be read to check the status of the WPEN, WIP, WEL,

BP1 and BP0 bits (Figure 2-6). A read attempt of a

memory array location will not be possible during a

write cycle. When the write cycle is completed, the

write enable latch is reset.

FIGURE 2-2:

BYTE WRITE SEQUENCE

Twc

9 10 11

29 30 31 32 33 34 35 36 37 38 39

SCK

Instruction

24-bit Address

23 22 21 20

Data Byte

High-Impedance

 2010 Microchip Technology Inc.

DS21836G-page 9

1...6 7 8910 11 12...34

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与25AA1024T-I/MFG相关器件

型号	品牌	描述	获取价格	数据表
25AA1024TI/P	MICROCHIP	1M X 8 SPI BUS SERIAL EEPROM, PDIP8, ROHS COMPLIANT, PLASTIC, DIP-8	获取价格
25AA1024T-I/P	MICROCHIP	1 Mbit SPI Bus Serial EEPROM	获取价格
25AA1024TI/SM	MICROCHIP	1M X 8 SPI BUS SERIAL EEPROM, PDSO8, 5.28 MM, ROHS COMPLIANT, PLASTIC, DSM-8	获取价格
25AA1024T-I/SM	MICROCHIP	1 Mbit SPI Bus Serial EEPROM	获取价格
25AA1024T-I/SMG	MICROCHIP	128K X 8 SPI BUS SERIAL EEPROM, PDSO8, 0.208 INCH, PLASTIC, SOIC-8	获取价格
25AA128	MICROCHIP	128K SPI Bus Serial EEPROM	获取价格

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