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24LC64I/SN PDF预览

24LC64I/SN

更新时间: 2024-11-19 23:19:15
品牌 Logo 应用领域
其他 - ETC 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
24页 395K
描述
64K I2CT Serial EEPROM(406.89 k)

24LC64I/SN 数据手册

 浏览型号24LC64I/SN的Datasheet PDF文件第2页浏览型号24LC64I/SN的Datasheet PDF文件第3页浏览型号24LC64I/SN的Datasheet PDF文件第4页浏览型号24LC64I/SN的Datasheet PDF文件第5页浏览型号24LC64I/SN的Datasheet PDF文件第6页浏览型号24LC64I/SN的Datasheet PDF文件第7页 
24AA64/24LC64  
M
64K I2CSerial EEPROM  
Device Selection Table  
Description  
The Microchip Technology Inc. 24AA64/24LC64  
(24XX64*) is a 64 Kbit Electrically Erasable PROM.  
The device is organized as eight blocks of 1K x 8-bit  
memory with a 2-wire serial interface. Low voltage  
design permits operation down to 1.8V with standby  
and active currents of only 1 µA and 1 mA respectively.  
It has been developed for advanced, low power appli-  
cations such as personal communications or data  
acquisition. The 24XX64 also has a page-write capabil-  
ity for up to 32 bytes of data. Functional address lines  
allow up to eight devices on the same bus, for up to  
512 Kbits address space. The 24XX64 is available in  
the standard 8-pin PDIP, surface mount SOIC, TSSOP  
and MSOP packages.  
Part  
VCC  
Max Clock  
Temp  
Number  
Range  
Frequency  
Ranges  
(1)  
24AA64  
24LC64  
1.8-5.5  
2.5-5.5  
400 kHz  
I
400 kHz  
I, E  
Note 1: 100 kHz for VCC <2.5V  
Features  
• Single supply with operation down to 1.8V  
• Low power CMOS technology  
- 1 mA active current typical  
- 1 µA standby current (max.) (I-temp)  
• Organized as 8 blocks of 8K bit (64K bit)  
• 2-wire serial interface bus, I2C™ compatible  
• Cascadable for up to eight devices  
• Schmitt trigger inputs for noise suppression  
• Output slope control to eliminate ground bounce  
Package Types  
PDIP/SOIC/TSSOP/MSOP  
ROTATED TSSOP  
(24AA64X/24LC64X)  
A0  
A1  
A2  
1
2
3
4
8 Vcc  
7 WP  
8
7
6
5
1
2
3
4
• 100 kHz (24AA64) and 400 kHz (24LC64) com-  
patibility  
WP  
Vcc  
A0  
SCL  
SDA  
Vss  
A2  
6
5
SCL  
SDA  
• Self-timed write cycle (including auto-erase)  
• Page-write buffer for up to 32 bytes  
• 2 ms typical write cycle time for page-write  
• Hardware write protect for entire memory  
• Can be operated as a serial ROM  
• Factory programming (QTP) available  
• ESD protection > 4,000V  
A1  
Vss  
Block Diagram  
A0 A1 A2WP  
HV GENERATOR  
• 1,000,000 erase/write cycles  
• Data retention > 200 years  
• 8-lead PDIP, SOIC, TSSOP, and MSOP package  
• Available temperature ranges:  
I/O  
CONTROL  
LOGIC  
MEMORY  
CONTROL  
LOGIC  
EEPROM  
ARRAY  
XDEC  
PAGE LATCHES  
- Industrial (I):  
- Automotive (E):  
-40°C to +85°C  
-40°C to +125°C  
I/O  
SCL  
YDEC  
SDA  
VCC  
VSS  
SENSE AMP  
R/W CONTROL  
*24XX64 is used in this document as a generic part number for the 24AA64/24LC64 devices.  
2002 Microchip Technology Inc.  
DS21189E-page 1  

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