Datasheet > 存储 > EEPROM> 24LC1025-E/SN

24LC1025-E/SN

更新时间： 2024-02-28 18:26:07

品牌	Logo	应用领域
美国微芯 - MICROCHIP		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
26页	296K
描述
1024K I2C™ CMOS Serial EEPROM

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24LC1025-E/SN 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	3.90 MM, ROHS COMPLIANT, PLASTIC, SOIC-8	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.51	Factory Lead Time：	10 weeks
风险等级：	1.29	其他特性：	200 YEARS DATA RETENTION
最大时钟频率 (fCLK)：	0.4 MHz	数据保留时间-最小值：	200
耐久性：	1000000 Write/Erase Cycles	I2C控制字节：	1010MDDR
JESD-30 代码：	R-PDSO-G8	JESD-609代码：	e3
长度：	4.9 mm	内存密度：	1048576 bit
内存集成电路类型：	EEPROM	内存宽度：	8
湿度敏感等级：	3	功能数量：	1
端子数量：	8	字数：	131072 words
字数代码：	128000	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	128KX8	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP8,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
并行/串行：	SERIAL	峰值回流温度（摄氏度）：	260
电源：	3/5 V	认证状态：	Not Qualified
座面最大高度：	1.75 mm	串行总线类型：	I2C
最大待机电流：	0.000005 A	子类别：	EEPROMs
最大压摆率：	0.005 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	2.5 V	标称供电电压 (Vsup)：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn) - annealed
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	40
宽度：	3.9 mm	最长写入周期时间 (tWC)：	5 ms
写保护：	HARDWARE	Base Number Matches：	1

24LC1025-E/SN 数据手册

24AA1025/24LC1025/24FC1025

6.2

Page Write

6.0

6.1

WRITE OPERATIONS

Byte Write

The write control byte, word address and the first data

byte are transmitted to the 24XX1025 in the same way

as in a byte write. But instead of generating a Stop

condition, the master transmits up to 127 additional

bytes, which are temporarily stored in the on-chip page

buffer and will be written into memory after the master

has transmitted a Stop condition. After receipt of each

word, the seven lower Address Pointer bits are

internally incremented by one. If the master should

transmit more than 128 bytes prior to generating the

Stop condition, the address counter will roll over and

the previously received data will be overwritten. As with

the byte write operation, once the Stop condition is

received, an internal write cycle will begin (Figure 6-2).

If an attempt is made to write to the array with the WP

pin held high, the device will acknowledge the

command, but no write cycle will occur, no data will be

written and the device will immediately accept a new

command.

Following the Start condition from the master, the

control code (four bits), the block select (one bit), the

Chip Select (two bits), and the R/W bit (which is a logic

low) are clocked onto the bus by the master transmitter.

This indicates to the addressed slave receiver that the

address high byte will follow after it has generated an

Acknowledge bit during the ninth clock cycle.

Therefore, the next byte transmitted by the master is

the high-order byte of the word address and will be

written into the Address Pointer of the 24XX1025. The

next byte is the Least Significant Address Byte. After

receiving another Acknowledge signal from the

24XX1025, the master device will transmit the data

word to be written into the addressed memory location.

The 24XX1025 acknowledges again and the master

generates a Stop condition. This initiates the internal

write cycle and during this time, the 24XX1025 will not

generate Acknowledge signals as long as the control

byte being polled matches the control byte that was

used to initiate the write (Figure 6-1). If an attempt is

made to write to the array with the WP pin held high, the

device will acknowledge the command, but no write

cycle will occur, no data will be written and the device

will immediately accept a new command. After a byte

Write command, the internal address counter will point

to the address location following the one that was just

written.

6.3

Write Protection

The WP pin allows the user to write-protect the entire

array (00000-1FFFF) when the pin is tied to VCC. If tied

to VSS the write protection is disabled. The WP pin is

sampled at the Stop bit for every Write command

(Figure 1-1). Toggling the WP pin after the Stop bit will

have no effect on the execution of the write cycle.

Note:

Page write operations are limited to writing

bytes within a single physical page,

regardless of the number of bytes actually

being written. Physical page boundaries

start at addresses that are integer

multiples of the page buffer size (or ‘page

size’) and end at addresses that are

integer multiples of [page size – 1]. If a

Page Write command attempts to write

across a physical page boundary, the

result is that the data wraps around to the

beginning of the current page (overwriting

data previously stored there), instead of

being written to the next page as might be

expected. It is therefore necessary for the

application software to prevent page write

operations that would attempt to cross a

page boundary.

Note:

When doing a write of less than 128 bytes

the data in the rest of the page is refreshed

along with the data bytes being written.

This will force the entire page to endure a

write cycle, for this reason endurance is

specified per page.

 2010 Microchip Technology Inc.

DS21941G-page 9

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