PRELIMINARY
MX23L3216
32M-BIT MASK ROM
FEATURES
PIN DESCRIPTION
• Bit organization
Symbol
Pin Function
A0~A21
Address Inputs, A0 not used in word
- 4Mb x 8 (byte mode)
- 2Mb x 16 (word mode)
• Fast access time
- Random access:80/25ns(max.)
• Page Size
mode
D0~D15
Data Outputs
CE0#, CE1# Chip Enable Input
CE2#
OE#
Output Enable Input
Word/Byte mode Selection
Power Supply Pin
Output VCC Pin
- 8 words per page
• Current
BYTE#
VCC
VCCQ
GND
NC
- Operating:40mA
- Standby:15uA(max.)
• Supply voltage
Ground Pin
No Connection
- VCC : 2.7 ~ 3.6V
- VCCQ : 2.7 ~ 3.6V
• Package
CHIP ENABLETRUTHTABLE
CE2#
CE1#
CE0#
Device
Enabled
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
Disabled
- 64 ball mini BGA (10.0mm X 13.0mm, ball pitch
1.0mm)
L
L
L
L
L
H
L
- 56 pin TSOP (14mm x 20mm)
• Temperature
L
H
H
L
L
H
L
--25~85°C
H
H
H
H
L
H
L
H
H
H
Note: for single-chip applications, CE2#, CE1# can be
strapped to GND.
PIN CONFIGURATION
56TSOP (NormalType)
1
2
3
4
5
6
7
8
NC
CE1#
A21
A20
A19
A18
A17
A16
VCC
A15
A14
A13
A12
CE0#
NC
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
NC
NC
OE#
NC
D15
D7
D14
D6
GND
D13
D5
D12
D4
VCCQ
GND
D11
D3
D10
D2
VCC
D9
D1
D8
D0
A0
BYTE#
NC
CE2#
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
MX23L3216
NC
A11
A10
A9
A8
GND
A7
A6
A5
A4
A3
A2
A1
P/N:PM0860
REV. 1.0, OCT. 03, 2001
1