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2308B-5HDCGI8 PDF预览

2308B-5HDCGI8

更新时间: 2024-11-19 08:57:07
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
13页 162K
描述
Clock Driver, PDSO16

2308B-5HDCGI8 数据手册

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3.3V ZERO DELAY  
CLOCK MULTIPLIER  
IDT2308B  
ADVANCE  
INFORMATION  
FEATURES:  
DESCRIPTION:  
• Phase-Lock Loop Clock Distribution for Applications ranging  
from 10MHz to 133MHz operating frequency  
Distributes one clock input to two banks of four outputs  
• Separate output enable for each output bank  
• External feedback (FBK) pin is used to synchronize the outputs  
to the clock input  
TheIDT2308Bisahigh-speedphase-lockloop(PLL)clockmultiplier.Itis  
designedtoaddresshigh-speedclockdistributionandmultiplicationapplica-  
tions.Thezerodelayisachievedbyaligningthephasebetweentheincoming  
clockandtheoutputclock,operablewithintherangeof10to133MHz.  
TheIDT2308Bhastwobanksoffouroutputseachthatarecontrolledviatwo  
selectaddresses.Byproperselectionofinputaddresses,bothbankscanbe  
put in tri-state mode. In test mode, the PLL is turned off, and the input clock  
directlydrives theoutputs forsystemtestingpurposes.Intheabsenceofan  
inputclock,theIDT2308Benterspowerdown,andtheoutputsaretri-stated.  
Inthis mode, the device willdrawless than2A.  
• Output Skew <200 ps  
Low jitter <200 ps cycle-to-cycle  
• 1x, 2x, 4x output options (see table):  
IDT2308B-1 1x  
IDT2308B-2 1x, 2x  
IDT2308B-3 2x, 4x  
IDT2308B-4 2x  
The IDT2308B is available in six unique configurations for both pre-  
scaling and multiplication of the Input REF Clock. (See available options  
table.)  
IDT2308B-1H, -2H, and -5H for High Drive  
No external RC network required  
• Operates at 3.3V VDD  
ThePLLisclosedexternallytoprovidemoreflexibilitybyallowingtheuser  
tocontrolthedelaybetweentheinputclockandtheoutputs.  
TheIDT2308BischaracterizedforbothIndustrialandCommercialopera-  
tion.  
Available in SOIC and TSSOP packages  
NOTE: For new designs, refer to AN-233.  
FUNCTIONALBLOCKDIAGRAM  
(-3, -4)  
16  
2
FBK  
REF  
2
CLKA1  
PLL  
1
2
(-5)  
3
CLKA2  
14  
CLKA3  
15  
CLKA4  
8
9
S2  
S1  
Control  
Logic  
2
(-2, -3)  
6
CLKB1  
CLKB2  
CLKB3  
CLKB4  
7
10  
11  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
OCTOBER 2005  
1
c
2005 Integrated Device Technology, Inc.  
DSC 6995/2  

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