Philips Semiconductors Programmable Logic Devices
Product specification
ECL programmable array logic
10H20EV8/10020EV8
The 10H20EV8/10020EV8 also features the
ability to Preload the registers to any desired
state during testing. The Preload is not
affected by the pattern within the device, so
can be performed at any step in the testing
sequence. This permits full logical verification
even after the device has been patterned.
DESCRIPTION
PIN CONFIGURATIONS
The 10H20EV8/10020EV8 is an ultra
F Package
high-speed universal ECL PAL device.
Combining versatile output macrocells with a
standard AND/OR single programmable
array, this device is ideal in implementing a
user’s custom logic. The use of Philips
Semiconductors state-of-the-art bipolar oxide
isolation process enables the
10H20EV8/10020EV8 to achieve optimum
speed in any design. The SNAP design
software package from Philips
1
2
24
23
22
21
20
19
18
17
16
15
14
13
I
I
V
I
1
CC
2
11
3
CLK/I
I
10
12
4
F
F
F
1
2
8
7
FEATURES
5
F
• Ultra high speed ECL device
6
V
V
F
CO1
CO2
– t = 4.5ns (max)
PD
7
F
3
6
5
Semiconductors simplifies design entry
based upon Boolean or state equations.
– t = 2.6ns (max)
IS
8
F
4
F
I
– t
– f
= 2.3ns (max)
= 208MHz
CKO
MAX
9
I
3
9
The 10H20EV8/10020EV8 is a two-level logic
element comprised of 11 fixed inputs, an
input pin that can either be used as a clock or
12th input, 90 AND gates, and 8 Output Logic
Macrocells. Each Output Macrocell can be
individually configured as a dedicated input,
dedicated output with polarity control, a
bidirectional I/O, or as a registered output
that has both output polarity control and
feedback to the AND array. This gives the
part the capability of having up to 20 inputs
and eight outputs.
10
11
12
I
I
I
I
4
8
• Universal ECL Programmable Array Logic
– 8 user programmable output macrocells
– Up to 20 inputs and 8 outputs
I
5
7
6
V
EE
F = Ceramic DIP (300mil-wide)
– Individual user programmable output
polarity
• Variable product term distribution allows
A Package
increased design capability
NC
1
CLK/I
I
I
V
I
I
12
2
1
CC 11 10
28 27 26
• Asynchronous Preset and Reset capability
• 10KH and 100K options
4
3
2
5
6
25
24
23
22
21
20
19
F
F
F
F
The 10H20EV8/10020EV8 has a variable
number of product terms that can be OR’d
per output. Four of the outputs have 12 AND
terms available and the other four have 8
terms per output. This allows the designer the
extra flexibility to implement those functions
that he couldn’t in a standard PAL device.
Asynchronous Preset and Reset product
terms are also included for system design
ease. Each output has a separate output
enable product term. Another feature added
for the system designer is a power-up Reset
on all registered outputs.
1
2
8
7
• Power-up Reset and Preload function to
enhance state machine design and testing
7
V
V
CO2
CO1
NC
NC
8
• Design support provided via SNAP and
other CAD tools
9
F
3
F
6
• Security fuse for preventing design
10
11
F
4
F
5
duplication
I
I
3
9
• Available in 24-Pin 300mil-wide DIP and
12 13 14 15 16 17 18
NC
28-Pin PLCC.
I
I
I
I
I
8
V
4
5
6
7
EE
A = Plastic Leaded Chip Carrier
ORDERING INFORMATION
DESCRIPTION
ORDER CODE
DRAWING NUMBER
10H20EV8–4F
10020EV8–4F
24-Pin Ceramic Dual In-Line (300mil-wide)
28-Pin Plastic Leaded Chip Carrier
0586B
10H20EV8–4A
10020EV8–4A
0401F
PAL is a registered trademark of Monolithic Memories, Inc., a wholly owned subsidiary of Advanced Micro Devices, Inc.
113
October 22, 1993
853–1423 11164
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