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100395QCX PDF预览

100395QCX

更新时间: 2024-11-24 23:17:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 转换器电平转换器驱动程序和接口锁存器接口集成电路
页数 文件大小 规格书
5页 57K
描述
ECL-to-TTL Translator

100395QCX 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:LCC包装说明:0.450 X 0.450 INCH, PLASTIC, MO-047, LCC-28
针数:28Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.71Is Samacsys:N
最大延迟:6.4 ns接口集成电路类型:ECL TO TTL TRANSLATOR
JESD-30 代码:S-PQCC-J28JESD-609代码:e3
长度:11.43 mm湿度敏感等级:2
位数:1功能数量:9
端子数量:28最高工作温度:85 °C
最低工作温度:输出特性:3-STATE
输出锁存器或寄存器:REGISTER输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC28,.5SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):235
电源:5,-4.5 V认证状态:Not Qualified
座面最大高度:4.57 mm子类别:Level Translators
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V电源电压1-最大:-5.7 V
电源电压1-分钟:-4.2 V电源电压1-Nom:-4.5 V
表面贴装:YES技术:ECL
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:11.43 mmBase Number Matches:1

100395QCX 数据手册

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February 1990  
Revised November 1999  
100395  
Low Power 9-Bit ECL-to-TTL Translator with Registers  
General Description  
Features  
The 100395 is a 9-bit translator for converting F100K logic  
levels to TTL logic levels. A HIGH on the output enable  
(OE) holds the TTL outputs in a high impedance state. Two  
separate clock inputs are available for multiplexing and  
system level testing.  
64 mA IOL drive capability  
2000V ESD protection  
4.2V to 5.7V operating range  
Registered outputs  
TTL outputs  
The 100395 is designed with TTL 64 mA outputs for bus  
driving capability. All inputs have 50 kpull down resistors.  
When the inputs are either unconnected or at the same  
potential, the outputs will go LOW.  
Ordering Code:  
Order Number Package Number  
Package Description  
100395QC  
V28A  
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Descriptions  
Truth Table  
Pin Names  
Description  
Inputs  
CP2 OE  
Outputs  
QN  
D0D8  
Q0Q8  
OE  
Data Inputs (ECL)  
Data Outputs (TTL)  
Output Enable (ECL)  
Clock Inputs (ECL)  
CP1  
DN  
L
L
L
L
L
L
L
L
CP1, CP2  
L
L
H
H
X
X
X
X
H
L
H
X
L
L
H
X
H
L
X
X
X
H
NC  
NC  
NC  
Z
X
X
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Don't Care  
Z = High Impedance  
NC = No Change  
© 1999 Fairchild Semiconductor Corporation  
DS010651  
www.fairchildsemi.com  

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