Datasheet > ZM7332G-65508A-T2

ZM7332G-65508A-T2

更新时间： 2024-02-18 06:44:58

品牌	Logo	应用领域
BEL		/
页数	文件大小	规格书
32页	1420K
描述
Power Supply Management Circuit, Fixed, 1 Channel, 9 X 9 MM, ROHS COMPLIANT, MO-220, QFN-64

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ZM7332G-65508A-T2 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	HVQCCN,	针数：	64
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.82
可调阈值：	NO	模拟集成电路 - 其他类型：	POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码：	S-XQCC-N64	JESD-609代码：	e3
长度：	9 mm	湿度敏感等级：	3
信道数量：	1	功能数量：	1
端子数量：	64	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	0.9 mm
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	3 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
温度等级：	INDUSTRIAL	端子面层：	MATTE TIN
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	40
宽度：	9 mm	Base Number Matches：	1

ZM7332G-65508A-T2 数据手册

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ZM7300G Series Digital Power Manager

Preliminary Data Sheet

Pins Description

ACFAIL_N, AC Fail Input (Pin 16): Schmitt-Trigger

input with internal pull-up resistor (active low).

Pulling low the input indicates to the DPM that an

AC-DC front-end has lost the mains and that a

system shut down should immediately be initiated.

released, POLs are assumed to be disconnected

from the DPM.

IR, Internal Reset (Pin 63): Connect to VSS via a

10kOhm resistor.

ADDR[0:2], I²C Address Inputs (Pins 47, 46, 45):

Inputs with internal pull-up resistor. The 3 bit

LCK_N, Memory Lock (Pin 61): Active low input

with internal pull-up. When LCK_N is pulled low, all

memory within the DPM is write-protected. The write

protection cannot be disabled by software.

encoded

address

determines

the

DPM

communication address for the I²C interface.

AREF, Analog Reference (Pin 44): An analog

reference which is used internally. A 10nF capacitor

should be connected as close as possible to the

package between AREF and VSS.

OKA, OKB, OKC, OKD, Group OK Signals (Pins

11, 13, 20, 53): An open drain input/output with

internal pull-up resistor. Pulling low the OK input will

indicate to the DPM a fault in a Group, the DPM can

also pull an OK line low to disable a Group.

CB, Crowbar Output (Pin 23): A CMOS output

which is used to trigger a crowbar (SCR) in case of

overvoltage on the Intermediate Voltage Bus.

PG[0:3], Power Good (Pins 54, 52, 51, 49): Input

with internal pull-up resistor. The pin is used to read

the status of an Auxiliary Device.

EN[0:3], Enable Outputs for Auxiliary Devices

(Pins 5, 7, 55, 50): CMOS outputs to control

Auxiliary Devices like linear regulators, analog POLs,

fans or other devices.

RES_N, Active Low Reset In/Out (Pin 18): Input

with internal pull-up resistor. When pulled low a soft

reset of the system (sequenced turned off of all

POLs and Auxiliary Devices) is initiated. When

released the whole system is reprogrammed and

started if necessary.

FE_EN, Front-End Enable (Pin 17): A CMOS

output which is used to turn-on/off the DC/DC

converter generating the IBV.

SD, Sync Data Line (Pin 56): An open drain input /

output with internal pull-up resistor. Communication

line to distribute a master clock to all converters and

at the same time to communicate with all POLs.

HRES_N, Hardware Reset (Pin 4): Input with

internal pull-up resistor. When pulled low a cold start

of the Digital Power Manager is initiated. This

function should not be used to initiate normal system

shut-down or turn-on.

JTAG Interface (Pins 34, 33, 32, 31): Connect to a

JTAG

IEEE-1149.1-compliant

programmer

IBVS, Intermediate Voltage Bus Sense (Pin 48):

Analog input to an internal ADC circuit to measure

the Intermediate Bus Voltage. The full scale range

of the input is 2.56V and the IBV should be scaled

down by a factor of 5.7 for proper reporting of the

IBV with the Z-ONE™ GUI.

supporting SVF files or leave open, if not used.

VDD, Positive Supply (Pins 6, 25, 42, 57, 60):

Supply voltage.

At least 4x100nF decoupling

capacitors should be connected between VDD and

VSS pins. All VDD pins must be connected.

INT[0:3], Interrupts (Pins 41, 40, 37, 36): Four

active low inputs with internal pull-ups. Each of the

inputs can be configured for two functions: first, the

interrupt input acts on the OK line(s) to stop

momentarily the operation of group of POLs and

Auxiliary Devices, second the interrupt can be used

as a hot swap trigger. In this function the interrupt

input triggers the programming of a group. When

VSS, Ground (Pins 8, 9, 26, 38, 43, 58): Ground.

Decoupling capacitors need to be connected as

close as possible to the pins. All VSS pins must be

connected.

nc, No Connect (Pin 1, 2, 3, 10, 12, 14, 15, 19, 21,

22, 24, 28, 29, 35, 39, 59, 62, 64): All nc pins must

remain floating.

REV. 2.2 OCT 23, 2006

www.power-one.com

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与ZM7332G-65508A-T2相关器件

型号	品牌	获取价格	描述	数据表
ZM7332G-65508-B1	POWER-ONE	获取价格	Digital Power Manager
ZM7332G-65508-B2	POWER-ONE	获取价格	Digital Power Manager
ZM7332G-65508-Q1	POWER-ONE	获取价格	Digital Power Manager
ZM7332G-65508-T1	POWER-ONE	获取价格	Digital Power Manager
ZM7332G-65508-T2	POWER-ONE	获取价格	Digital Power Manager
ZM7332G-65508X-B2	BEL	获取价格	Power Management Circuit, PQCC64
ZM7332G-65508X-T1	BEL	获取价格	Power Management Circuit, PQCC64
ZM7332G-65508Y-B1	POWER-ONE	获取价格	Digital Power Manager
ZM7332G-65508Y-B2	POWER-ONE	获取价格	Digital Power Manager
ZM7332G-65508Y-Q1	POWER-ONE	获取价格	Digital Power Manager

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