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ZL50073_06 PDF预览

ZL50073_06

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 开关
页数 文件大小 规格书
68页 618K
描述
32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps), and 128 Inputs and 128 Outputs

ZL50073_06 数据手册

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ZL50073  
Data Sheet  
Change Summary  
The following table captures the changes from the April 2005 issue.  
Page  
28  
29  
29  
30  
Item  
10.4.1, “Read Cycle“  
Figure 10 "Read Cycle Operation"  
10.4.2, “Write Cycle“  
Change  
Clarified WAIT signal description in Read Cycle.  
Corrected WAIT signal tristate timing in Read Cycle.  
Clarified WAIT signal description in Write Cycle.  
Corrected WAIT signal tristate timing in write Cycle.  
Figure 11 "Write Cycle Operation"  
43  
Table 23 “BER Counter Group and  
Stream Address Mapping“  
Corrected BER Counter Group and Stream Mapping  
Addresses.  
The following table captures the changes from the July 2004 issue.  
Page  
Item  
Change  
12  
"Pin Description" - CKo0-3  
Added special requirement for using output clock at  
65.536 MHz.  
13  
54  
56  
57  
"Pin Description" - DTA, WAIT  
Added more detailed description to the DTA and WAIT  
pins.  
Added tFPIS, tFPIH (input frame pulse setup and hold)  
maximum values.  
“AC Electrical Characteristics1 - FPi0-2  
and CKi0-2 Timing“  
Figure 13 "Frame Skew Timing Diagram" Added FPi1,2 frame pulse to Figure “Frame Skew Timing  
Diagram” to clarify frame boundary skew.  
(1) “AC Electrical Characteristics1 -  
FPO0-3 and CKO0-3 (65.536 MHz)  
Timing“  
Added CKO0-3 and FPO0-3 setup and hold parameters for  
all different clock rates.  
(2) “AC Electrical Characteristics1 -  
FPO0-3 and CKO0-3 (32.768 MHz)  
Timing“  
(3) “AC Electrical Characteristics1 -  
FPO0-3 and CKO0-3 (16.384 MHz)  
Timing“  
(4) “AC Electrical Characteristics1 -  
FPO0-3 and CKO0-3 (8.192 MHz)  
Timing“  
58  
59  
“AC Electrical Characteristics - Output  
Clock Jitter Generation“  
“AC Electrical Characteristics1 - Serial  
Data Timing2 to CKi“  
Added this table to specify CKO0-3 jitter generation.  
(1) Values of parameters tSIPS, tSIPH, tSINS, tSINH, tSINV,  
tSIPV, SIPZ and tSINZ are revised.  
t
(2) Separated parameter tCKD into tCKDP and tCKDN.  
Added more detail to figure.  
60  
61  
Figure 16 "Serial Data Timing to CKi"  
“AC Electrical Characteristics - Serial  
Data Timing1 to CKo2“  
Values of parameters tSOPS, SOPH, SONS, SONH, SOPV,  
t
t
t
t
tSONV, SOPZ and tSONZ are revised.  
t
62  
63  
Figure 17 "Serial Data Timing to CKo"  
“AC Electrical Characteristics - CKo to  
Other CKo Skew1“  
Added more detail to figure.  
Added CKO skew parameters, tCKOS  
.
63  
Figure 18 "CKo to other CKo Skew"  
Added figure to show tCKOS.  
7
Zarlink Semiconductor Inc.  

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