TPS56C230
ZHCSJH9A –AUGUST 2019–REVISED AUGUST 2019
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
–0.3
–0.3
–0.3
–0.3
–0.3
–1
MAX
20
25
6
UNIT
V
VIN
BST
V
Input voltage
BST-SW
V
EN, MODE, FB, SS
PGND, AGND,
SW
6
V
0.3
20
22
6
V
V
Output voltage
SW (10-ns transient)
PGOOD
–3
V
–0.3
–40
–55
V
TJ
Operating junction temperature
Storage temperature
150
150
°C
°C
Tstg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
±2000
±500
UNIT
V
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22- V C101(2)
Electrostatic
discharge
V(ESD)
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
18
UNIT
V
VIN
4.5
–0.3
–0.3
–0.3
–0.3
–1
BST
23.5
5.5
5.5
0.3
18
V
Input voltage
BST-SW
EN, MODE, FB, SS
PGND, AGND
SW
V
V
V
V
Output voltage
PGOOD
–0.3
5.5
12
V
IOUT
TJ
Output current
A
Operating junction temperature
–40
125
°C
6.4 Thermal Information
TPS56C230
RJE (VQFN)
20 PINS
42.3
THERMAL METRIC(1)
UNIT
RθJA
Junction-to-ambient thermal resistance (standard board)
Junction-to-ambient thermal resistance (4-layer custom board)(2)
Junction-to-case (top) thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
RθJA_effective
RθJC(top)
RθJB
28.2
26.2
Junction-to-board thermal resistance
13
ψJT
Junction-to-top characterization parameter
1.3
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report.
(2) 70 mm x 70 mm, 4 layers, thickness: 1.5 mm. 2 oz. copper traces located on the top and bottom of the PCB. 4 thermal vias in the
PowerPAD area under the device package.
4
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