Datasheet > XRT7295AEIWTR-F

XRT7295AEIWTR-F

更新时间： 2022-09-29 19:40:44

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XRT7295AEIWTR-F 数据手册

XRT7295AE

Line Termination and Input Capacitance

External Loop Filter Capacitor

Figure 3 shows the connection to an external 0.1µF

capacitorattheLPF1/LPF2pins.Thiscapacitorispart

of the PLL filter. A non-polarized, low-leakage capaci-

tor should be used. A ceramic capacitor with the value

0.1µF +/-20% is acceptable.

The recommended receive termination is shown in

Figure3.The75Ωresistorterminatesthecoaxialcable

with its characteristic impedance. The 0.01µF capaci-

tor to R_INcouples the signal into the receive input

without disturbing the internally generated DC bias

level present on R_IN. The input capacitance at the R_IN

pin is 2.8pF.

XRT7295AE

Figure 3. Receiver Configuration

some jitter appears on RCLK because of jitter on the

incoming signal. (The following section discussed the

jitter transfer characteristic, which describes the rela-

tionshipbetweeninputandoutputjitter.)Second,noise

sources within the XRT7295AE or noise sources that

arecoupledintothedevicethroughthepowersupplies

create jitter on RCLK. The magnitude of this

TIMINGRECOVERY

OutputJitter

The total jitter appearing on the RCLK output during

normal operation consists of two components. First,

Rev. 2.0.0

1...3 4 567 8 9...15

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型号	品牌	描述	获取价格	数据表
XRT7295AT	EXAR	DS3/Sonet STS-1 Integrated Line Receiver	获取价格
XRT7295AT_10	EXAR	DS3 SONET STS1 Integrated Line Receiver	获取价格
XRT7295ATIW	EXAR	DS3/Sonet STS-1 Integrated Line Receiver	获取价格
XRT7295ATIW-F	EXAR	DS3 SONET STS1 Integrated Line Receiver	获取价格
XRT7295E	EXAR	INTEGRATED LINE RECEIVER	获取价格
XRT7295E	PULSE	T3/DS3/E3/STS-1 TRANSFORMERS	获取价格