Datasheet > XPC862PCZP66

XPC862PCZP66

更新时间： 2024-02-14 22:03:42

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		时钟外围集成电路
页数	文件大小	规格书
82页	530K
描述
32-BIT, 66MHz, RISC PROCESSOR, PBGA357, PLASTIC, BGA-357

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XPC862PCZP66 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
零件包装代码：	BGA	包装说明：	BGA,
针数：	357	Reach Compliance Code：	compliant
ECCN代码：	5A991	HTS代码：	8542.31.00.01
风险等级：	5.47	地址总线宽度：	32
位大小：	32	边界扫描：	YES
外部数据总线宽度：	32	格式：	FLOATING POINT
集成缓存：	YES	JESD-30 代码：	S-PBGA-B357
JESD-609代码：	e0	长度：	25 mm
低功率模式：	YES	湿度敏感等级：	3
端子数量：	357	封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装形状：	SQUARE
封装形式：	GRID ARRAY	峰值回流温度（摄氏度）：	220
认证状态：	Not Qualified	座面最大高度：	2.05 mm
速度：	66 MHz	最大供电电压：	3.465 V
最小供电电压：	3.135 V	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
端子面层：	TIN LEAD	端子形式：	BALL
端子节距：	1.27 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	30	宽度：	25 mm
uPs/uCs/外围集成电路类型：	MICROPROCESSOR, RISC	Base Number Matches：	1

XPC862PCZP66 数据手册

Features

controller (I C) channel. The memory controller has been enhanced, enabling the MPC862 to support any

type of memory, including high-performance memories and new types of DRAMs. A PCMCIA socket

controller supports up to two sockets. A real-time clock has also been integrated.

Table 1 shows the functionality supported by the members of the MPC862 family.

Table 1. MPC862 Family Functionality

Cache

Ethernet

Part

SCC

Instruction

Cache

Data Cache

10T

10/100

MPC862DT

MPC862DP

MPC862SR

MPC862T

4 Kbyte

16 Kbyte

4 Kbyte

16 Kbyte

4 Kbyte

8 Kbyte

4 Kbyte

8 Kbyte

Up to 2

Up to 4

—

MPC862P

Unless otherwise speciﬁed, the PowerQUICC unit is referred to as the MPC862 in this document.

Part II Features

The following list summarizes the key MPC862 features:

•

Embedded single-issue, 32-bit MPC8xx core (implementing the PowerPC architecture) with

thirty-two 32-bit general-purpose registers (GPRs)

— The core performs branch prediction with conditional prefetch, without conditional execution

— 4- or 8-Kbyte data cache and 4- or 16-Kbyte instruction cache (see Table 1).

– 16-Kbyte instruction caches (MPC862P and MPC862DP) are four-way, set-associative

with 256 sets; 4-Kbyte instruction caches (MPC862T, MPC862SR, and MPC862DT) are

two-way, set-associative with 128 sets.

– 8-Kbyte data caches (MPC862P and MPC862DP) are two-way, set-associative with 256

sets; 4-Kbyte data caches (MPC862T, MPC862SR, and MPC862DT) are two-way,

set-associative with 128 sets.

– Cache coherency for both instruction and data caches is maintained on 128-bit (4-word)

cache blocks.

– Caches are physically addressed, implement a least recently used (LRU) replacement

algorithm, and are lockable on a cache block basis.

— MMUs with 32-entry TLB, fully associative instruction and data TLBs

— MMUs support multiple page sizes of 4, 16, and 512 Kbytes, and 8 Mbytes; 16 virtual address

spaces and 16 protection groups

— Advanced on-chip-emulation debug mode

•

The MPC862 provides enhanced ATM functionality over that of the MPC860SAR. The MPC862

adds major new features available in “enhanced SAR” (ESAR) mode, including the following:

— Multiple APC priority levels available to support a range of trafﬁc pace requirements

— Port-to-port switching capability without the need for RAM-based microcode

MPC862FamilyHardwareSpeciﬁcations

MOTOROLA

123 4 5 6 7...82

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与XPC862PCZP66相关器件

型号	品牌	描述	获取价格	数据表
XPC862PCZP66B	MOTOROLA	32-BIT, 66MHz, RISC PROCESSOR, PBGA357, PLASTIC, BGA-357	获取价格
XPC862PCZP66B	NXP	32-BIT, 66MHz, RISC PROCESSOR, PBGA357, PLASTIC, BGA-357	获取价格
XPC862PZP100B	MOTOROLA	32-BIT, 100MHz, RISC PROCESSOR, PBGA357, PLASTIC, BGA-357	获取价格
XPC862PZP100B	NXP	32-BIT, 100MHz, RISC PROCESSOR, PBGA357, PLASTIC, BGA-357	获取价格
XPC862PZP50	MOTOROLA	32-BIT, 50MHz, RISC PROCESSOR, PBGA357, PLASTIC, BGA-357	获取价格
XPC862PZP50B	MOTOROLA	32-BIT, 50MHz, RISC PROCESSOR, PBGA357, PLASTIC, BGA-357	获取价格

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