Datasheet > XMG3522R030QRQSTQ1

XMG3522R030QRQSTQ1

更新时间： 2023-09-03 20:35:37

品牌	Logo	应用领域
德州仪器 - TI		驱动驱动器
页数	文件大小	规格书
41页	2549K
描述
具有集成驱动器、保护和温度报告功能的汽车类 650V 30mΩ GaN FET \| RQS \| 52 \| -40 to 150

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XMG3522R030QRQSTQ1 数据手册

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LMG3522R030-Q1

ZHCSNE5C –OCTOBER 2020 –REVISED JUNE 2023

www.ti.com.cn

5 Pin Configuration and Functions

DRAIN

15 14

13 12 11 10

NC2

LDO5V

RDRV

TEMP

THERMAL PAD

NC2

FAULT

VDD

NC2

28 29

30 31 32 33 34 35 36 37

38 39 40 41

SOURCE

VNEG

图5-1. RQS Package, 52-Pin VQFN (Top View)

表5-1. Pin Functions

TYPE⁽¹⁾

DESCRIPTION

NAME

NC1

NO.

1, 16

2–15

Used to anchor QFN package to PCB. Pins must be soldered to PCB landing pads. The PCB landing pads are

non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Internally

connected to DRAIN.

—

DRAIN

NC2

GaN FET drain. Internally connected to NC1.

Used to anchor QFN package to PCB. Pins must be soldered to PCB landing pads. The PCB landing pads are

non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Internally

connected to SOURCE and THERMAL PAD.

17, 27, 43, 47,

—

SOURCE

VNEG

GaN FET source. Internally connected to NC2 and THERMAL PAD.

18–26, 28–39

Internal buck-boost converter negative output. Used as the negative supply to turn off the depletion mode GaN

FET. Bypass to SOURCE with a 2.2-µF capacitor.

40, 41

BBSW

VDD

Internal buck-boost converter switch pin. Connect an inductor from this point to SOURCE.

Device input supply.

CMOS-compatible non-inverting input used to turn the FET on and off.

Push-pull digital output that asserts low during a fault condition. Refer to Fault Detection for details.

FAULT

Push-pull digital output that asserts low during overcurrent and short-circuit fault conditions. Refer to Fault

Detection for details.

Push-pull digital output that gives information about the GaN FET temperature. Outputs a fixed 9-kHz pulsed

waveform. The device temperature is encoded as the duty cycle of the waveform.

TEMP

RDRV

LDO5V

Drive-strength selection pin. Connect a resistor from this pin to SOURCE to set the turn-on drive strength to

control slew rate. Tie the pin to SOURCE to enable 150 V/ns and tie the pin to LDO5V to enable 100 V/ns.

5-V LDO output for external digital isolator. If using this externally, connect a 0.1-µF or greater capacitor to

SOURCE.

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Product Folder Links: LMG3522R030-Q1

English Data Sheet: SNOSD97

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