Datasheet > XLH736001.000000X

XLH736001.000000X

更新时间： 2024-01-11 19:41:53

品牌	Logo	应用领域
艾迪悌 - IDT		振荡器
页数	文件大小	规格书
27页	612K
描述
HCMOS Output Clock Oscillator

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XLH736001.000000X 技术参数

生命周期：	Active	Reach Compliance Code：	compliant
风险等级：	5.71	振荡器类型：	HCMOS
Base Number Matches：	1

XLH736001.000000X 数据手册

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XL Family of Low Phase Noise

Quartz-based PLL Oscillators

Datasheet

Description

Features

▪ Output types: LVDS, LVPECL, LVCMOS

The IDT XL devices (XO and VCXO options) are ultra-precision

crystal oscillators with 750 to 890fs typical phase jitter over 12kHz

to 20MHz bandwidth. Available in a wide frequency range from

0.750MHz to 1350MHz, the XL series crystal oscillators utilize a

family of proprietary ASICs, with a key focus on noise reduction

technologies.

▪ Phase jitter (12kHz to 20MHz): 750fs to 890fs typical

▪ Supply voltage: 2.5V or 3.3V

▪ Package options:

• 3.2 × 2.5 × 1.0 mm (not available for VCXO)

• 5.0 × 3.2 × 1.2 mm

• 7.0 × 5.0 × 1.3 mm

The 3rd order Delta Sigma Modulator reduces noise to the levels

that are comparable to traditional Bulk Quartz and SAW

oscillators. With short lead-time, low cost, low noise, wide

frequency range, excellent ambient performance, the XL devices

are an excellent choice over the conventional technologies. The

XL (XO option) devices have stabilities as tight as ±20ppm and

the XL (VCXO option) devices have ±50ppm APR. Either option

provides extremely quick delivery for both standard and custom

frequencies.

▪ Operating temperature: -20°C to +70°C

• Frequency stability options: ±20, ±25, ±50, or ±100 ppm

(XO only)

• ±50ppm APR (VCXO only)

▪ Operating temperature: -40°C to +85°C

• Frequency stability options: ±25, ±50, or ±100 ppm

(XO only)

• ±50ppm APR (VCXO only)

▪ Operating temperature: -40°C to +105°C (XO only)

• Frequency stability options: ±50 or ±100 ppm

▪ kV of 85ppm/volt typical from 0.5VDC to VDD (VCXO only)

• Better than ±10% linearity for Vc range

Pin Assignments (XO option)

NOTE: To minimize power supply line noise, a 0.01μF bypass capacitor should be placed between V_DD(Pin 6) and GND (Pin 3) on 6-pin

devices, or V_DD(Pin 4) and GND (Pin 2) on 4-pin devices.

Table 1. XO 6-pin Package

Table 2. XO 4-pin Package

Number

Name

Description

Number

Name

Description

[a][b]

E/D

Enable/Disable

No connect

E/D

GND

OUT

Enable/Disable

Connect to ground

Output

E/D

No connect

[a][b]

Enable/Disable

Supply voltage

GND

OUT

Connect to ground

Output

[a] Pulled high internally.

[b] Low = output disabled.

OUT2

Complementary output

Supply voltage

See Ordering Information (XO) for more details.

1 September 7, 2018

12 3 4 5 6 7...27

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