DRA821U-Q1, DRA821U
ZHCSKS2E –APRIL 2020 –REVISED JUNE 2023
www.ti.com.cn
DRA821
Navigator Subsystem(E)
System Services(E)
Mailboxes UDMA
2x Arm®
Cortex®-R5F(E)
(with optional Lockstep)
Dual Arm®
Cortex®-A72
SecProxy
UDMA
PVU
CPTS
Proxy/RA
WWDT
GPIO
INTR
Mailbox
GP Timers
Debug
MCRC
INTA
Spinlock
TIMER-MGR
Channelized FW
64K L2 RAM
per Core(E)
1MB Shared L2
512KB L2
Cache with ECC
with ECC
Spinlock
Memory Subsystem
Security Accelerators
3DES AES
RNG
DES
SHA
PKA
MSMC
1MB SRAM with ECC(E)
MCU Island
EMIF 1x32 LPDDR4 with ECC(E)
Navigator Subsystem
2x Arm®
Cortex®-R5F
(with optional Lockstep)
DMSC
10x GP Timers
2x RTI/WWDT
Safety DTK
Proxy
INTA
UDMA
INTR
RA
GPMC
ELM
SA2UL
MCRC
Channelized FW
512KB SRAM(E)
SP RAM 512B
1 MB SRAM
Interconnect
Media and Data Storage
Control Interfaces
General Connectivity
High-Speed Serial Interfaces
1x PCIe®4-Lane Port (B)
6x EPWM
3x ECAP
3x EQEP
1x eMMC
2x WKUP GPIO
2x GPIO(F)
1x USB 3.0 DRD(B)
8x MCSPI(D)(F)
1x SD/SDIO
(D)
3x MCSPI(A)
Ethernet Switch(B)
(Up to 4-ports
QSGMII/SGMII/RGMII/RMII/
XFI/USXGMII)
1x OSPI or
1x HyperBus(A)(C)
11x UART(F)
1x UART (A)
8x I2C(F)
Automotive Interfaces
Audio Peripherals
18x CAN-FD(E)
3x MCASP
10/100/1000 Ethernet(A)
1x ADC(A)
1x I3C
2x CAN-FD(A)
1x I3C(A)
2x I2C(A)
A. WKUP 和MCU 域实例都位于MCU 岛上,但可供整个系统访问。
B. SGMII、USB3.0 和PCIE 共用总共四个串行器/解串器通道。最多可同时使用三个IP(例如SGMII 和USB)中的两个。
C. 闪存接口可配置为OSPI0 或HyperBus。
D. 一个端口仅在内部连接。未连接到任何引脚。
E. 黑色实线框表示IP 是扩展MCU (eMCU) 的一部分。
F. 黑色虚线框表示IP 的某些实例存在于eMCU 中,而某些实例存在于主域的非eMCU 部分中。
图3-1. 功能方框图
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: DRA821U-Q1 DRA821U
English Data Sheet: SPRSP57