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X84641IG

更新时间: 2024-11-19 03:15:03
品牌 Logo 应用领域
ICMIC 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
18页 147K
描述
レPort Saver EEPROM

X84641IG 数据手册

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TM  
ICmic  
This X84161/641/129 device has been acquired by  
IC MICROSYSTEMS from Xicor, Inc.  
IC MICROSYSTEMS  
MPSTM EEPROM  
16K/64K/128K  
X84161/641/129  
µPort Saver EEPROM  
FEATURES  
DESCRIPTION  
•Up to 10MHz data transfer rate  
•25ns Read Access Time  
The µPort Saver memories need no serial ports or special  
hardware and connect to the processor memory bus.  
•Direct Interface to Microprocessors and  
Microcontrollers  
—Eliminates I/O port requirements  
Replacing bytewide data memory, the µPort Saver uses  
bytewide memory control functions, takes a fraction of  
the board space and consumes much less power.  
Replacing serial memories, the µPort Saver provides all  
—No interface glue logic required  
—Eliminates need for parallel to serial converters  
the serial benefits, such as low cost, low power, low voltage,  
and small package size while releasing I/Os for  
more important uses.  
•Low Power CMOS  
—1.8V–3.6V, 2.5V–5.5V and 5V 10% Versions  
—Standby Current Less than 1µA  
The µPort Saver memory outputs data within 25ns of an  
active read signal. This is less than the read access time  
—Active Current Less than 1mA  
•Byte or Page Write Capable  
of most hosts and provides “no-wait-state” operation. This  
prevents bottlenecks on the bus. With rates to 10  
—32-Byte Page Write Mode  
•Typical Nonvolatile Write Cycle Time: 2ms  
•High Reliability  
MHz, the µPort Saver supplies data faster than required by  
most host read cycle specifications. This eliminates  
—100,000 Endurance Cycles  
—Guaranteed Data Retention: 100 Years  
the need for software NOPs.  
The µPort Saver memories communicate over one line of  
the data bus using a sequence of standard bus read and  
write operations. This “bit serial” interface allows the µPort  
Saver to work well in 8-bit, 16 bit, 32-bit, and 64-bit  
systems.  
A Write Protect (WP) pin prevents inadvertent writes to the  
memory.  
Xicor EEPROMs are designed and tested for  
applications requiring extended endurance. Inherent data  
retention is greater than 100 years.  
BLOCK DIAGRAM  
System Connection  
Internal Block Diagram  
MPS  
H.V. GENERATION  
TIMING & CONTROL  
WP  
A15  
µP  
µC  
A0  
D7  
DSP  
ASIC  
CE  
I/O  
OE  
EEPROM  
ARRAY  
COMMAND  
DECODE  
RISC  
X
DEC  
D0  
AND  
CONTROL  
LOGIC  
16K x 8  
8K x 8  
2K x 8  
P0/CS  
OE  
P1/CLK  
P2/DI  
P3/DO  
Ports  
Saved  
WE  
WE  
Y DECODE  
DATA REGISTER  
7008 FRM F02.1  
©Xicor, Inc. 1994, 1997Patents  
Characteristics subject to change without notice  
1
Pending 7008-1.2 8/26/97 T2/C0/D0 SH  

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