Datasheet > X4163S8-4.5A

X4163S8-4.5A

更新时间： 2024-01-27 08:45:47

品牌	Logo	应用领域
瑞萨 - RENESAS		光电二极管
页数	文件大小	规格书
22页	924K
描述
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, SOIC-8

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数据手册

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X4163S8-4.5A 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
包装说明：	PLASTIC, SOIC-8	Reach Compliance Code：	unknown
风险等级：	5.76	可调阈值：	YES
模拟集成电路 - 其他类型：	POWER SUPPLY MANAGEMENT CIRCUIT	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e0	长度：	4.89 mm
信道数量：	1	功能数量：	1
端子数量：	8	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	认证状态：	Not Qualified
座面最大高度：	1.75 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	宽度：	3.9 mm
Base Number Matches：	1

X4163S8-4.5A 数据手册

X4163, X4165

Figure 6. Valid Start and Stop Conditions

SCL

SDA

Start

Stop

Serial Start Condition

eight bits. During the ninth clock cycle, the receiver will

pull the SDA line LOW to acknowledge that it received

the eight bits of data. Refer to Figure 7.

All commands are preceded by the start condition, which

is a HIGH to LOW transition of SDA when SCL is HIGH.

The device continuously monitors the SDA and SCL

lines for the start condition and will not respond to any

command until this condition has been met. See Figure

The device will respond with an acknowledge after rec-

ognition of a start condition and if the correct Device

Identifier and Select bits are contained in the Slave

Address Byte. If a write operation is selected, the device

will respond with an acknowledge after the receipt of

each subsequent eight bit word. The device will

acknowledge all incoming data and address bytes,

except for the Slave Address Byte when the Device

Identifier and/or Select bits are incorrect.

Serial Stop Condition

All communications must be terminated by a stop condi-

tion, which is a LOW to HIGH transition of SDA when SCL

is HIGH. The stop condition is also used to place the

device into the Standby power mode after a read

sequence. A stop condition can only be issued after the

transmitting device has released the bus. See Figure 6.

In the read mode, the device will transmit eight bits of

data, release the SDA line, then monitor the line for an

acknowledge. If an acknowledge is detected and no stop

condition is generated by the master, the device will con-

tinue to transmit data. The device will terminate further

data transmissions if an acknowledge is not detected.

The master must then issue a stop condition to return

the device to Standby mode and place the device into a

known state.

Serial Acknowledge

Acknowledge is a software convention used to indicate

successful data transfer. The transmitting device, either

master or slave, will release the bus after transmitting

Figure 7. Acknowledge Response From Receiver

SCL from

Master

Data Output

from

Transmitter

Data Output

from Receiver

Start

Acknowledge

FN8120 Rev 2.00

November 26, 2007

Page 10 of 22

1...7 8 91011 12 13...22

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与X4163S8-4.5A相关器件

型号	品牌	描述	获取价格	数据表
X4163S8I	INTERSIL	CPU Supervisor with 16K EEPROM	获取价格
X4163S8I	RENESAS	1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, SOIC-8	获取价格
X4163S8I-2.7	INTERSIL	CPU Supervisor with 16K EEPROM	获取价格
X4163S8I-2.7A	INTERSIL	CPU Supervisor with 16K EEPROM	获取价格
X4163S8I-2.7A	RENESAS	1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, PLASTIC, SOIC-8	获取价格
X4163S8I-4.5A	INTERSIL	CPU Supervisor with 16K EEPROM	获取价格

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