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X40626V14-2.7A PDF预览

X40626V14-2.7A

更新时间: 2024-10-03 20:24:15
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管
页数 文件大小 规格书
22页 850K
描述
2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14, TSSOP-14

X40626V14-2.7A 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP-14
针数:14Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.76Is Samacsys:N
可调阈值:YES模拟集成电路 - 其他类型:POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码:R-PDSO-G14JESD-609代码:e0
长度:5 mm湿度敏感等级:1
信道数量:2功能数量:1
端子数量:14最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/5 V
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Power Management Circuits最大供电电流 (Isup):3 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.1 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

X40626V14-2.7A 数据手册

 浏览型号X40626V14-2.7A的Datasheet PDF文件第2页浏览型号X40626V14-2.7A的Datasheet PDF文件第3页浏览型号X40626V14-2.7A的Datasheet PDF文件第4页浏览型号X40626V14-2.7A的Datasheet PDF文件第5页浏览型号X40626V14-2.7A的Datasheet PDF文件第6页浏览型号X40626V14-2.7A的Datasheet PDF文件第7页 
DATASHEET  
X40626  
FN8119  
Rev 0.00  
March 28, 2005  
64K, 8K x 8 Bit Dual Voltage CPU Supervisor with 64K Serial EEPROM  
FEATURES  
• 2.7V to 5.5V power supply operation  
• Available Packages  
—14-lead SOIC  
—14-lead TSSOP  
• Dual voltage monitoring  
—V  
operates independent of V  
2Mon  
CC  
• Watchdog timer with selectable timeout intervals  
• Low V detection and reset assertion  
—Four standard reset threshold voltages  
CC  
DESCRIPTION  
—User programmable V  
—Reset signal valid to V =1V  
• Low power CMOS  
—20µA max standby current, watchdog on  
—1µA standby current, watchdog OFF  
• 64Kbits of EEPROM  
threshold  
The X40626 combines four popular functions, Power-on  
Reset Control, Watchdog Timer, Dual Supply Voltage  
Supervision, and Serial EEPROM Memory in one pack-  
age. This combination lowers system cost, reduces  
board space requirements, and increases reliability.  
TRIP  
CC  
Applying power to the device activates the power-on  
reset circuit which holds RESET active for a period of  
time. This allows the power supply and oscillator to stabi-  
lize before the processor can execute code.  
—64 byte page size  
• Built-in inadvertent write protection  
—Power-up/power-down protection circuitry  
—Protect 0, 1/4, 1/2, all or 64, 128, 256 or 512  
bytes of EEPROM array with programmable  
The Watchdog Timer provides an independent protec-  
tion mechanism for microcontrollers. When the micro-  
controller fails to restart a timer within a selectable time-  
out interval, the device activates the RESET signal. The  
user selects the interval from three preset values. Once  
selected, the interval does not change, even after cycling  
the power.  
Block Lock protection  
• 400kHz 2-wire interface  
—Slave addressing supports up to 4 devices on  
the same bus  
BLOCK DIAGRAM  
V2FAIL  
+
V2MON  
V
-
TRIP2  
V2 Monitor  
Logic  
Watchdog Transition  
Detector  
Watchdog  
Timer Reset  
WP  
Protect Logic  
RESET  
Data  
Register  
SDA  
Status  
Register  
Command  
Reset &  
Watchdog  
Timebase  
SCL  
Decode &  
Control  
Logic  
S0  
S1  
64KB  
EEPROM  
Array  
V
Threshold  
CC  
Reset logic  
Power-on and  
Low Voltage  
Reset  
V
+
-
CC  
Generation  
V
TRIP  
FN8119 Rev 0.00  
March 28, 2005  
Page 1 of 22  

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