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X40626V14T1 PDF预览

X40626V14T1

更新时间： 2024-10-03 20:09:07
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管
页数 文件大小 规格书
22页 337K
描述
IC,POWER SUPPLY SUPERVISOR,CMOS,TSSOP,14PIN,PLASTIC

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X40626V14T1 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：TSSOP, TSSOP14,.25Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.76JESD-30 代码：R-PDSO-G14
JESD-609代码：e0湿度敏感等级：1
端子数量：14最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP14,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源：5 V认证状态：Not Qualified
子类别：Power Management Circuits最大供电电流 (Isup)：3 mA
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
Base Number Matches：1

X40626V14T1 数据手册

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X40626  
®
64K, 8K x 8 Bit  
Data Sheet  
March 28, 2005  
FN8119.0  
PRELIMINARY  
• 2.7V to 5.5V power supply operation  
• Available Packages  
—14-lead SOIC  
Dual Voltage CPU Supervisor with 64K  
Serial EEPROM  
—14-lead TSSOP  
FEATURES  
• Dual voltage monitoring  
DESCRIPTION  
—V  
operates independent of V  
2Mon  
CC  
The X40626 combines four popular functions, Power-on  
Reset Control, Watchdog Timer, Dual Supply Voltage  
Supervision, and Serial EEPROM Memory in one pack-  
age. This combination lowers system cost, reduces  
board space requirements, and increases reliability.  
• Watchdog timer with selectable timeout intervals  
• Low V detection and reset assertion  
CC  
—Four standard reset threshold voltages  
—User programmable V  
threshold  
TRIP  
—Reset signal valid to V =1V  
CC  
• Low power CMOS  
Applying power to the device activates the power-on  
reset circuit which holds RESET active for a period of  
time. This allows the power supply and oscillator to stabi-  
lize before the processor can execute code.  
—20µA max standby current, watchdog on  
—1µA standby current, watchdog OFF  
• 64Kbits of EEPROM  
—64 byte page size  
• Built-in inadvertent write protection  
—Power-up/power-down protection circuitry  
—Protect 0, 1/4, 1/2, all or 64, 128, 256 or 512  
bytes of EEPROM array with programmable  
Block Lock protection  
• 400kHz 2-wire interface  
The Watchdog Timer provides an independent protec-  
tion mechanism for microcontrollers. When the micro-  
controller fails to restart a timer within a selectable time-  
out interval, the device activates the RESET signal. The  
user selects the interval from three preset values. Once  
selected, the interval does not change, even after cycling  
the power.  
™
—Slave addressing supports up to 4 devices on  
the same bus  
BLOCK DIAGRAM  
V2FAIL  
+
V2MON  
V
-
TRIP2  
V2 Monitor  
Logic  
Watchdog Transition  
Detector  
Watchdog  
Timer Reset  
WP  
Protect Logic  
RESET  
Data  
Register  
SDA  
Status  
Register  
Command  
Reset &  
Watchdog  
Timebase  
SCL  
Decode &  
Control  
Logic  
S0  
S1  
64KB  
EEPROM  
Array  
V
Threshold  
CC  
Reset logic  
Power-on and  
Low Voltage  
Reset  
V
+
-
CC  
Generation  
V
TRIP  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
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