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X1241V8I-2.7 PDF预览

X1241V8I-2.7

更新时间: 2024-01-06 04:46:05
品牌 Logo 应用领域
瑞萨 - RENESAS 时钟光电二极管外围集成电路
页数 文件大小 规格书
22页 195K
描述
0 TIMER(S), REAL TIME CLOCK, PDSO8, PLASTIC, TSSOP-8

X1241V8I-2.7 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:PLASTIC, TSSOP-8Reach Compliance Code:unknown
风险等级:5.75最大时钟频率:0.032 MHz
信息访问方法:I2C中断能力:N
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:4.4 mm端子数量:8
计时器数量:最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:3/3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Timer or RTC
最大供电电压:3.6 V最小供电电压:2.7 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
最短时间:SECONDS易失性:YES
宽度:3 mmuPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCK
Base Number Matches:1

X1241V8I-2.7 数据手册

 浏览型号X1241V8I-2.7的Datasheet PDF文件第4页浏览型号X1241V8I-2.7的Datasheet PDF文件第5页浏览型号X1241V8I-2.7的Datasheet PDF文件第6页浏览型号X1241V8I-2.7的Datasheet PDF文件第8页浏览型号X1241V8I-2.7的Datasheet PDF文件第9页浏览型号X1241V8I-2.7的Datasheet PDF文件第10页 
X1241 – Preliminary Information  
Figure 4. Power On Reset and Low Voltage Reset  
V
TRIP  
V
CC  
t
t
PURST  
PURST  
t
RPD  
t
F
t
R
RESET  
V
RVALID  
V
THRESHOLD RESET PROCEDURE  
Setting the V  
Voltage  
CC  
TRIP  
It is necessary to reset the trip point before setting the  
new value.  
The X1241 is shipped with a standard V  
threshold  
CC  
(V  
) voltage. This value will not change over normal  
TRIP  
operating and storage conditions. However, in applica-  
tions where the standard V is not exactly right, or if  
To set the new V  
threshold voltage to the V pin and tie the RESET pin  
to the programming voltage V . Then write data 00h to  
address 01h. The stop bit following a valid write opera-  
tion initiates the V  
RESET LOW to complete the operation.  
voltage, apply the desired V  
TRIP  
TRIP  
TRIP  
CC  
higher precision is needed in the V  
value, the  
TRIP  
P
X1241 threshold may be adjusted. The procedure is  
described below, and uses the application of a non vol-  
atile write control signal.  
programming sequence. Bring  
TRIP  
Note: This operation also writes 00h to address 01h of  
the EEPROM array.  
Figure 5. Set V  
Level Sequence (V = desired V value.)  
TRIP  
TRIP  
CC  
V
= 15V  
P
RESET  
0
1
2
3
4
5 6 7  
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4 5 6 7  
SCL  
SDA  
AEh  
00h  
01h  
00h  
Resetting the V  
Voltage  
be reset. When V  
is reset, the new V  
is some-  
TRIP  
TRIP  
TRIP  
thing less than 1.7V. This procedure must be used to  
set the voltage to a lower value.  
This procedure is used to set the V  
voltage level. For example, if the current V  
to a “native”  
TRIP  
is 4.4V  
TRIP  
and the new V  
must be 4.0V, then the V  
must  
TRIP  
TRIP  
Characteristics subject to change without notice. 7 of 22  
REV 1.1.3 2/13/01  
www.xicor.com  

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