Datasheet > X1203S8

X1203S8

更新时间： 2024-10-02 23:29:31

品牌	Logo	应用领域
其他 - ETC		外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数	文件大小	规格书
20页	90K
描述
IC-SMD-RTC WITH EEPROM

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中文翻译

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数据手册

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X1203S8 数据手册

2-Wire^™RTC

X1203

Real Time Clock/Calendar/Alarm

DESCRIPTION

FEATURES

• 2 Alarms—Interrupt Output

The X1203 is a Real Time Clock with clock/calendar

circuits and two alarms. The dual port clock and alarm

registers allow the clock to operate, without loss of

accuracy, even during read and write operations.

—Settable on the second, 10s of seconds,

minute, 10s of minutes, hour, day, month, or

day of the week

—Repeat alarm for time base generation

• 2 Wire interface interoperable with I²C

—400kHz data transfer rate

• Secondary Power Supply Input with internal

Switch-Over Circuitry

• Year 2000 Compliant

• Low Power CMOS

—<1µA operating current

The clock/calendar provides functionality that is con-

trollable and readable through a set of registers. The

clock, using a low cost 32.768kHz crystal input, accu-

rately tracks the time in seconds, minutes, hours, date,

day, month and years. It has leap year correction,

automatic adjustment for the year 2000 and months

with less than 31 days.

—<3µA active current during program

—<400µA active current during data read

• Typical Nonvolatile Write Cycle Time: 5ms

• High Reliability

An alarm match of the RTC sets an interrupt ﬂag and

activates an interrupt pin. An alternative alarm function

provides a pulsed interrupt for long time constant time-

bases.

—100,000 endurance cycles

The device offers a backup power input pin. This

Vback pin allows the device to be backed up by a non-

rechargeable battery. The RTC is fully operational from

2.5 to 6 volts.

—Guaranteed data retention: 100 years

• Small Package Options

—8-lead SOIC package, 8-lead TSSOP package

BLOCK DIAGRAM

Timer

Calendar

Logic

Frequency

Divider

1Hz

32.768kHz

Oscillator

Time

Keeping

Registers

(SRAM)

Control

Status

Control

Decode

Logic

Compare

Registers

Alarm

(EEPROM)

(SRAM)

Serial

Interface

Decoder

SCL

SDA

Alarm Regs

(EEPROM)

Interrupt Enable

Alarm

IRQ

Xicor, Inc. 2000 Patents Pending

9900-3002.1 4/28/00 EP

Characteristics subject to change without notice. 1 of 20

12 3 4 5 6 7...20

中文翻译

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与X1203S8相关器件

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X1205S8IT1	INTERSIL	获取价格	2-Wire RTC Real Time Clock/Calendar
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