WED3DL328V
White Electronic Designs
8Mx32 SDRAM
DESCRIPTION
FEATURES
n 53% Space Savings vsꢀ Monolithic Solution
n Reduced System Inductance and Capacitance
n Pinout and Footprint Compatible to SSRAM 119 BGA
n 3ꢀ3V Operating Supply Voltage
The WED3DL328V is an 8Mx32 Synchronous DRAM
configured as 4x2Mx32ꢀ The SDRAM BGA is con-
structed with two 8Mx16 SDRAM die mounted on a
multi-layer laminate substrate and packaged in a 119
lead, 14mm by 22mm, BGAꢀ
n Fully Synchronous to Positive Clock Edge
n Clock Frequencies of 133MHz, 125MHz and 100MHz
n Burst Operation
The WED3DL328V is an ideal SDRAM wide I/O memory
solution for all high performance, computer applica-
tions which include Network Processors, DSPs and
Functional ASICsꢀ
Sequential or Interleave
The WED3DL328V is available in clock speeds of
133MHz, 125MHz and 100MHzꢀ The range of operat-
ing frequencies, programmable burst lengths and
programmable latencies allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applicationsꢀ
Burst Length = Programmable 1, 2, 4, 8 or Full Page
Burst Read and Write
Multiple Burst Read and Single Write
n Data Mask Control Per Byte
n Auto and Self Refresh
The package and design provides performance en-
hancements via a 50% reduction in capacitance vsꢀ
two monolithic devicesꢀ The design includes internal
ground and power planes which reduces inductance
on the ground and power pins allowing for improved
decoupling and a reduction in system noiseꢀ
n Automatic and Controlled Precharge Commands
n Suspend Mode and Power Down Mode
n 119 Pin BGA, JEDEC MO-163
PIN DESCRIPTION
FIGꢀ 1
PIN CONFIGURATION
(TOP VIEW)
A0 A11
BA0-1
DQ
Address Bus
Bank Select Addresses
Data Bus
1
2
3
BA0
NC/A12
BA1
VSS
VSS
VSS
DQMC
VSS
NC
4
5
A10
6
7
A
B
C
D
E
F
VDDQ
NC
NC
NC
CAS
VDD
NC
CE
A7
VDDQ
NC
A
B
C
D
E
F
NC
*
A11
NC
CLK
CKE
DQM
RAS
CAS
CE
Clock
NC
NC
A9
A8
NC
Clock Enable
DQC
DQC
VDDQ
DQC
DQC
VDDQ
DQD
DQD
VDDQ
DQD
DQD
NC
NC
VSS
VSS
VSS
DQMB
VSS
NC
NC
DQB
DQB
VDDQ
DQB
DQB
VDDQ
DQA
DQA
VDDQ
DQA
DQA
NC
Data Input/Output Mask
Row Address Strobe
Column Address Strobe
Chip Enable
DQC
DQC
DQC
DQC
VDD
DQD
DQD
DQD
DQD
NC
DQB
DQB
DQB
DQB
VDD
DQA
DQA
DQA
DQA
NC
RAS
NC
CKE
VDD
CLK
NC
WE
A1
G
H
J
G
H
J
VDD
Power Supply pins, 3(3V
Data Bus Power Supply pins,3(3V
Ground pins
VDDQ
VSS
K
L
VSS
DQMD
VSS
VSS
VSS
NC
VSS
DQMA
VSS
VSS
VSS
NC
K
L
M
N
P
R
T
U
M
N
P
R
T
A0
A6
VDD
A4
A2
NC
NC
A5
A3
NC
NC
VDDQ
1
NC
NC
NC
4
NC
NC
VDDQ
7
U
2
3
5
6
*NOTE: Pin B3 is designated as NC/A12ꢀ This pin is used for future density upgrades as address pin A12
ꢀ
1
White Electronic Designs Corporation (508) 366-5151 wwwꢀwhiteedcꢀcom
June 2002, Revꢀ 1
ECO #15237