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WED3DL328V

更新时间: 2024-09-30 03:54:59
品牌 Logo 应用领域
WEDC 动态存储器
页数 文件大小 规格书
27页 1197K
描述
8Mx32 SDRAM

WED3DL328V 数据手册

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WED3DL328V  
White Electronic Designs  
8Mx32 SDRAM  
FEATURES  
DESCRIPTION  
The WED3DL328V is an 8Mx32 Synchronous DRAM  
configured as 4x2Mx32. The SDRAM BGA is constructed  
with two 8Mx16 SDRAM die mounted on a multi-layer  
laminate substrate and packaged in a 119 lead, 14mm by  
22mm, BGA.  
53% Space Savings vs. Monolithic Solution  
Reduced System Inductance and Capacitance  
Pinout and Footprint Compatible to SSRAM 119 BGA  
3.3V Operating Supply Voltage  
The WED3DL328V is an ideal SDRAM wide I/O memory  
solution for all high performance, computer applications  
which include Network Processors, DSPs and Functional  
ASICs.  
Fully Synchronous to Positive Clock Edge  
Clock Frequencies of 133MHZ, 125MHZ and 100MHZ  
Burst Operation  
Sequential or Interleave  
The WED3DL328V is available in clock speeds of 133MHZ,  
125MHZ and 100MHZ. The range of operating frequencies,  
programmable burst lengths and programmable latencies  
allow the same device to be useful for a variety of  
high bandwidth, high performance memory system  
applications.  
Burst Length = Programmable 1, 2, 4, 8 or Full  
Page  
Burst Read and Write  
Multiple Burst Read and Single Write  
Data Mask Control Per Byte  
The package and design provides performance  
enhancements via a 50% reduction in capacitance vs.  
two monolithic devices. The design includes internal ground  
and power planes which reduces inductance on the ground  
and power pins allowing for improved decoupling and a  
reduction in system noise.  
Auto and Self Refresh  
Automatic and Controlled Precharge Commands  
Suspend Mode and Power Down Mode  
119 Pin BGA, JEDEC MO-163  
PIN CONFIGURATION  
(TOP VIEW)  
PIN DESCRIPTION  
A0 – A11 Address Bus  
1
2
3
4
5
6
7
BA0-1  
DQ  
Bank Select Addresses  
Data Bus  
VCCQ  
NC  
BA0  
NC  
A10  
A7  
VCCQ  
A
B
C
D
E
F
A
B
C
D
E
F
NC  
NC  
NC  
NC  
NC/A12*  
BA1  
VSS  
CAS#  
VCC  
NC  
A11  
A9  
NC  
A8  
NC  
NC  
CK  
Clock  
CKE  
DQM  
RAS#  
CAS#  
CE#  
VCC  
Clock Enable  
DQc  
DQc  
VCCQ  
DQc  
DQc  
VCCQ  
DQd  
DQd  
VCCQ  
DQd  
DQd  
NC  
NC  
VSS  
VSS  
VSS  
DQMB  
VSS  
NC  
NC  
DQb  
DQb  
VCCQ  
DQb  
DQb  
VCCQ  
DQa  
DQa  
VCCQ  
DQa  
DQa  
NC  
Data Input/Output Mask  
Row Address Strobe  
Column Address Strobe  
Chip Enable  
DQc  
DQc  
DQc  
DQc  
VCC  
DQd  
DQd  
DQd  
DQd  
NC  
VSS  
CE#  
RAS#  
NC  
DQb  
DQb  
DQb  
DQb  
VCC  
DQa  
DQa  
DQa  
DQa  
NC  
VSS  
DQMC  
VSS  
G
H
J
G
H
J
CKE  
VCC  
CK  
Power Supply pins, 3.3V  
Data Bus Power Supply pins,3.3V  
Ground pins  
NC  
VCCQ  
VSS  
VSS  
VSS  
DQMA  
VSS  
VSS  
VSS  
NC  
K
L
K
L
DQMD  
VSS  
NC  
WE#  
A1  
M
N
P
R
T
M
N
P
R
T
VSS  
VSS  
A0  
A6  
NC  
VCC  
A4  
A2  
NC  
NC  
A5  
A3  
NC  
NC  
VCCQ  
NC  
NC  
NC  
NC  
NC  
VCCQ  
U
U
1
2
3
4
5
6
7
*NOTE: Pin B3 is designated as NC/A12. This pin is used for future density upgrades as address pin A12.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
June, 2002  
Rev. 1  
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  

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