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W764M32VESSBI PDF预览

W764M32VESSBI

更新时间: 2024-01-04 05:52:01
品牌 Logo 应用领域
WEDC 闪存
页数 文件大小 规格书
16页 505K
描述
64Mx32 Flash Multi-Chip Package 3.0V Page Mode Flash Memory

W764M32VESSBI 技术参数

是否Rohs认证: 不符合生命周期:Active
包装说明:BGA, BGA107,9X12,40Reach Compliance Code:compliant
风险等级:5.8其他特性:512,256 SECTOR OF 64K WORD ARE ALSO AVAILABLE
通用闪存接口:YES数据轮询:YES
数据保留时间-最小值:20JESD-30 代码:R-PBGA-B107
长度:17.1 mm内存密度:2147483648 bit
内存集成电路类型:FLASH内存宽度:32
功能数量:1端子数量:107
字数:67108864 words字数代码:64000000
工作模式:ASYNCHRONOUS组织:64MX32
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA107,9X12,40封装形状:RECTANGULAR
封装形式:GRID ARRAY并行/串行:PARALLEL
编程电压:3 V就绪/忙碌:YES
座面最大高度:3.11 mm最大待机电流:0.00002 A
最大压摆率:0.32 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM切换位:YES
类型:NOR TYPE宽度:14.1 mm
写保护:HARDWARE/SOFTWAREBase Number Matches:1

W764M32VESSBI 数据手册

 浏览型号W764M32VESSBI的Datasheet PDF文件第1页浏览型号W764M32VESSBI的Datasheet PDF文件第3页浏览型号W764M32VESSBI的Datasheet PDF文件第4页浏览型号W764M32VESSBI的Datasheet PDF文件第5页浏览型号W764M32VESSBI的Datasheet PDF文件第6页浏览型号W764M32VESSBI的Datasheet PDF文件第7页 
W764M32V-XSBX  
White Electronic Designs  
ADVANCED*  
GENERAL DESCRIPTION  
Sector Protection prevents unauthorized write and erase  
operations in any combination of sectors through a user-  
defined 64-bit password.  
The W764MB2V-XSBX device is a 3.0V single power  
flash memory. The device utilizes four organized as  
33,554,432 words or 67, 108,864 bytes. The device has  
64 -bit wide data bus that can also function as an 32-bit  
wide data bus by using the BYTE# input. The device can  
be programmed either in the host system or in standard  
EPROM programmers.  
The erase Suspend / Erase Resume feature allows the host  
system to pause and erase operation in a given sector to  
read or program any other sector and then complete the  
erase operation. The Program Suspend / Program Resume  
feature enables the host system to pause the program  
operation in a given sector to read any other sector and  
then complete the program operation.  
Each device requires a single 3.0 volt power supply for  
both read and write functions. In addition to a VCC input, an  
high-voltage accelerated program (WP /ACC) input provides  
shorter programming times through increased current. This  
feature is intended to facilitate factory throughput during  
system production, but may also be used in the field if  
desired.  
The hardware RESET# pin terminates any operation in  
progress and resets the device, after which it is then ready  
for a new operation. The RESET# pin may be tied to the  
system reset circuitry. A system reset would thus also  
reset the device, enabling the host system to read boot-up  
firmware from the Flash memory device.  
The devices are entirely command set compatible with the  
JEDEC single power-supply Flash standard. Commands  
are written to the device using standard microprocessor write  
timing. Write cycles also internally latch addresses and data  
needed for the programming and erase operations.  
The device reduces power consumption in the standby  
mode when it detects specific voltage levels on CS# and  
RESET#, or when addresses have been stable for a  
specified period of time.  
The sector erase architecture allows memory sectors to  
be erased and reprogrammed without affecting the data  
contents of other sectors. The device is fully erased when  
shipped from the factory.  
The Secured Silicon Sector provides a 128-work/256-byte  
area for code or data that can be permanently protected.  
Once this sector is protected, no further changes within the  
sector can occur.  
Device programming and erasure are initiated through  
command sequences. Once a program or erase operation  
has begun, the host system need only poll the DQ7 (Data#  
Polling) or DQ6 (toggle) status bits or monitor the Ready /  
Busy# (RY / BY#) output to determine whether the operation  
is complete. To facilitate programming, an Unlock Bypass  
mode reduces command sequence over head by requiring  
only two write cycles to program data instead of four.  
The Write Protect (WP# / ACC) feature protects the first or  
last sector by asserting a logic low on the WP# pin.  
The I/O (VIO) control allows the host system to set the  
voltage levels that the device generates and tolerates on  
all input levels (address, chip control, and DQ input levels)  
to the same voltage level that is asserted on the VIO pin.  
This allows the device to operate in a 1.8 V or 3 V system  
environment as required.  
Hardware data protection measures include a low VCC  
detector that automatically inhibits write operations during  
power transitions. Persistent Sector Protection provides  
in-system, comand-enabled protection of any combination  
of sectors using a single power supply at VCC. Password  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
March 2006  
Rev. 2  
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  

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