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VSC7940-W PDF预览

VSC7940-W

更新时间: 2024-02-09 09:26:29
品牌 Logo 应用领域
VITESSE 驱动器二极管激光二极管功率控制
页数 文件大小 规格书
16页 170K
描述
Interface Circuit, 1.773 X 2.233 MM, DIE-48

VSC7940-W 技术参数

生命周期:Obsolete零件包装代码:DIE
包装说明:DIE,针数:48
Reach Compliance Code:unknown风险等级:5.68
Is Samacsys:N接口集成电路类型:INTERFACE CIRCUIT
JESD-30 代码:R-XUUC-N48功能数量:1
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:RECTANGULAR
封装形式:UNCASED CHIP认证状态:Not Qualified
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:NO LEAD
端子位置:UPPERBase Number Matches:1

VSC7940-W 数据手册

 浏览型号VSC7940-W的Datasheet PDF文件第2页浏览型号VSC7940-W的Datasheet PDF文件第3页浏览型号VSC7940-W的Datasheet PDF文件第4页浏览型号VSC7940-W的Datasheet PDF文件第5页浏览型号VSC7940-W的Datasheet PDF文件第6页浏览型号VSC7940-W的Datasheet PDF文件第7页 
VITESSE  
SEMICONDUCTOR CORPORATION  
Preliminary Data Sheet  
SONET/SDH 3.125Gb/s  
VSC7940  
Laser Diode Driver with Automatic Power Control  
Features  
Applications  
SONET/SDH at 622Mb/s, 1.244Gb/s,  
2.488Gb/s, 3.125Gb/s  
• Power Supply: 5V ±5%  
• DC-Coupled to Laser Diode  
Full-Speed Fibre Channel (1.062Gb/s)  
• Programmable Modulation Current: 5mA to 100mA  
• Programmable Bias Current: 1mA to 100mA  
• Enable/Disable Control  
• Automatic Optical Average Power Control  
• Modulation and Bias Current Monitors  
General Description  
The VSC7940 is a single 5V supply laser diode driver specially designed for SONET/SDH applications up  
to 3.125Gb/s. External resistors set a wide range of bias and modulation currents for driving the laser. Data and  
clock inputs accept differential PECL signals. The Automatic Power Control (APC) loop maintains a constant  
average optical power over temperature and lifetime. The dominant pole of the APC loop can be controlled with  
an external capacitor. Other features include enable/disable control, programmable slow-start circuit to set laser  
turn-on delay, and failure-monitor output to indicate when the APC loop is unable to maintain the average opti-  
cal power. The VSC7940 is available in die form or in a 32-pin TQFP package.  
Block Diagram  
VCC  
LATCH  
IOUT+  
IOUT-  
CF  
RF  
MUX  
DATA+  
S E T  
D
Q
Q
DATA-  
CLK+  
CLK-  
VCC  
CLR  
BIAS  
VCC  
VCC  
ENABLE  
DISABLE  
MODMON  
BIASMON  
APC  
MD  
FAIL  
1nF  
CAPC  
BIASMAX  
APCSET  
MODSET  
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012  
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com  
Internet: www.vitesse.com  
G52357-0, Rev 3.2  
05/11/01  
Page 1  

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