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VIPER012LSTR

更新时间: 2024-01-17 17:27:17
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
36页 1677K
描述
Energy saving off-line high voltage converter

VIPER012LSTR 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:,Reach Compliance Code:compliant
Factory Lead Time:12 weeks风险等级:1.47
峰值回流温度(摄氏度):NOT SPECIFIED处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

VIPER012LSTR 数据手册

 浏览型号VIPER012LSTR的Datasheet PDF文件第2页浏览型号VIPER012LSTR的Datasheet PDF文件第3页浏览型号VIPER012LSTR的Datasheet PDF文件第4页浏览型号VIPER012LSTR的Datasheet PDF文件第6页浏览型号VIPER012LSTR的Datasheet PDF文件第7页浏览型号VIPER012LSTR的Datasheet PDF文件第8页 
VIPer01  
Pin setting  
1
Pin setting  
Figure 2: Connection diagram  
Table 1: Pin description  
Function  
SSOP10 Name  
Ground and MOSFET source. Connection of source of the internal MOSFET  
and the return of the bias current of the device. All groundings of bias  
components must be tied to a trace going to this pin and kept separate from the  
pulsed current return.  
1
GND  
Controller supply. An external storage capacitor has to be connected across  
this pin and GND. The pin, internally connected to the high voltage current  
source, provides the VCC capacitor charging current at startup and during  
steady-state operation, if the self-supply mode is selected. A small bypass  
capacitor (0.1 μF typ.) in parallel, placed as close as possible to the IC, is also  
recommended, for noise filtering purpose.  
2
VCC  
Disable. If its voltage exceeds the internal threshold VDIS_th (1.2 V typ.) for more  
than tDEB time (1 ms, typ.), the PWM is disabled in auto-restart mode. An input  
overvoltage protection can be built by connecting a voltage divider between DIS  
pin and the rectified mains. In case of non-isolated topologies, with the same  
principle an output overvoltage protection can be implemented. If the disable  
function is not required, DIS pin must be soldered to GND, which excludes the  
function.  
3
DIS  
FB  
Direct feedback. It is the inverting input of the internal transconductance E/A,  
which is internally referenced to 1.2 V with respect to GND. In case of non-  
isolated converter, the output voltage information is directly fed into the pin  
through a voltage divider. In case of primary regulation, the FB voltage divider is  
connected to the VCC. The E/A is disabled soldering FB to GND.  
4
5
Compensation. It is the output of the internal E/A. A compensation network is  
placed between this pin and GND to achieve stability and good dynamic  
COMP performance of the control loop. In case of secondary feedback, the internal E/A  
must be disabled and the COMP directly driven by the optocoupler to control the  
DRAIN peak current setpoint.  
MOSFET drain. The internal high voltage current source sinks current from this  
pin to charge the VCC capacitor at startup and during steady-state operation.  
These pins are mechanically connected to the internal metal PAD of the  
MOSFET in order to facilitate heat dissipation. On the PCB, copper area must  
6 to 10  
DRAIN  
be placed under these pins in order to decrease the total junction-to-ambient  
thermal resistance thus facilitating the power dissipation.  
DocID028751 Rev 1  
5/36  

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