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VE-J61-CY-F1 PDF预览

VE-J61-CY-F1

更新时间: 2022-09-21 20:19:54
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VICOR /
页数 文件大小 规格书
7页 664K
描述
CONVERTER MOD DC/DC 12V 50W

VE-J61-CY-F1 数据手册

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VI-J00, VE-J00  
Converter Specifications (Cont.)  
(Typical at TBP = 25°C, nominal line and 75% load, unless otherwise specified.)  
Output Characteristics  
VI-J00 E-Grade  
VI-J00 C-, I-, M-Grade  
Test  
Units  
Parameter  
Min  
Typ  
Max  
2%  
Min  
Typ  
Max  
1%  
Conditions  
Setpoint accuracy  
1%  
0.5%  
0.05%  
VNOM  
Load/line  
regulation  
LL to HL, 10%  
VNOM  
0.5%  
0.2%  
to Full Load  
Load/line  
regulation  
LL to HL, No  
VNOM  
1%  
0.2%  
0.5%  
0.02  
Load to 10%  
Output  
temperature drift  
Over rated  
0.02  
0.02  
0.01  
0.02  
% / °C  
temp.  
Long term drift  
Output ripple – pp:  
2V, 3.3V  
%/1K hours  
20MHz  
200  
5%  
100  
2%  
150  
3%  
mV  
bandwidth  
20MHz  
bandwidth  
5V  
VNOM  
20MHz  
bandwidth  
10 – 95V  
3%  
0.75%  
1.5%  
VNOM  
VNOM  
Trim range[a]  
50%  
0.5  
110%  
50%  
0.5  
110%  
Total  
0.25V max.  
neg. leg  
remote sense  
compensation  
Volts  
Automatic  
restart  
Current limit  
105%  
105%  
135%  
140%  
105%  
105%  
125%  
130%  
IFULL LOAD  
IFULL LOAD  
Short circuit  
current  
Automatic  
restart  
[a] 10V to 15V outputs, or “V” input range have standard trim range 10%. Consult factory for wider trim range.  
95V output –50 + 0% trim range.  
Note: The permissible load current must never be exceeded during normal, abnormal or test conditions. For additional output related application information,  
please refer to output connections on page 5.  
Control Pin Specifications  
VI-J00 E-Grade  
Typ  
VI-J00 C-, I-, M-Grade  
Typ  
Test  
Conditions  
Parameter  
Min  
Max  
Min  
Max  
Units  
Gate out  
impedance  
50  
1000  
6
50  
Ohms  
Ohms  
Volts  
Gate in impedance  
1000  
Gate in high  
threshold  
Use open  
collector  
6
6
Gate in low  
threshold  
0.65  
0.65  
Volts  
mA  
Gate in low  
current  
6
VI-J00 DC-DC Converters  
Page 3 of 7  
Rev 3.0  
06/2017  

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