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VCC6-QCC-180M00000 PDF预览

VCC6-QCC-180M00000

更新时间: 2024-02-15 23:11:12
品牌 Logo 应用领域
美高森美 - MICROSEMI 机械输出元件振荡器
页数 文件大小 规格书
8页 588K
描述
LVPECL Output Clock Oscillator, 180MHz Nom, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKAGE-6

VCC6-QCC-180M00000 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKAGE-6
Reach Compliance Code:compliant风险等级:5.71
其他特性:ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; OPTIONAL PACKAGE AVAILABLE; TAPE AND REEL最长下降时间:0.6 ns
频率调整-机械:NO频率稳定性:100%
JESD-609代码:e4安装特点:SURFACE MOUNT
标称工作频率:180 MHz最高工作温度:85 °C
最低工作温度:-40 °C振荡器类型:LVPECL
输出负载:50 OHM物理尺寸:7.0mm x 5.0mm x 1.6mm
最长上升时间:0.6 ns最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES最大对称度:55/45 %
端子面层:Gold (Au) - with Nickel (Ni) barrierBase Number Matches:1

VCC6-QCC-180M00000 数据手册

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Package and Pinout  
Table 3. Pinout  
Pin #  
Symbol  
Function  
The Enable/Disable function is set at the factory on either pin  
1 or pin 2 and is an ordering option. Outputs will be Enabled if  
the Enable/Disable is left open.  
1
2
3
4
5
6
E/D or NC  
E/D or NC  
GND  
Enable Disable or No Connection  
Enable Disable or No Connection  
Electrical and Lid Ground  
Output Frequency  
fO  
CfO  
Complementary Output Frequency  
Supply Voltage  
VDD  
7.0±0.15  
6
5
VCC6-XXX  
XXXMXX  
YYWW C  
2
4
1.96  
5.0±0.15  
1
3
3
1.78  
3.66  
1.6 max  
1.397  
1.27  
1
2
2.54  
Bottom View  
5
3.57  
5.08  
6
4
Dimensions are in mm  
2.54  
5.08  
Figure 4. Package Outline Drawing  
Figure 5. Pad Layout  
LVPECL Application Diagrams  
140Ω  
140Ω  
Figure 6. Standard PECL Output Configuration Figure 7. Single Resistor Termination Scheme  
Resistor values are typically 140 ohms for 3.3V  
Figure 8. Pull-Up Pull Down Termination  
Resistor values are typically for 3.3V operation  
For 2.5V operation, the resistor to ground is 62  
ohms and the resistor to supply is 240 ohms  
operation and 84 ohms for 2.5V operation.  
The VCC6 incorporates a standard PECL output scheme, which are un-terminated emitters as shown in Figure 6. There are numerous application notes on  
terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 7, and a pull-up/pull-down scheme as  
shown in Figure 8. An AC coupling capacitor is optional, depending on the application and the input logic requirements of the next stage.  
Vectron International • 267 Lowell Road, Suite 102, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com  
Page4  

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