Datasheet > VCC6-LCA-35M000000

VCC6-LCA-35M000000

更新时间： 2023-05-15 00:00:00

品牌	Logo	应用领域
美高森美 - MICROSEMI		/
页数	文件大小	规格书
8页	588K
描述
LVDS Output Clock Oscillator, 35MHz Nom, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKAGE-6

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Package and Pinout

Table 3. Pinout

Pin #

Symbol

Function

The Enable/Disable function is set at the factory on either pin

1 or pin 2 and is an ordering option. Outputs will be Enabled if

the Enable/Disable is left open.

E/D or NC

GND

Enable Disable or No Connection

Electrical and Lid Ground

Output Frequency

f_O

Cf_O

Complementary Output Frequency

Supply Voltage

V_DD

7.0±0.15

VCC6-XXX

XXXMXX

YYWW C

1.96

5.0±0.15

1.78

3.66

1.6 max

1.397

1.27

2.54

Bottom View

3.57

5.08

Dimensions are in mm

2.54

5.08

Figure 4. Package Outline Drawing

Figure 5. Pad Layout

LVPECL Application Diagrams

140Ω

Figure 6. Standard PECL Output Conﬁguration Figure 7. Single Resistor Termination Scheme

Resistor values are typically 140 ohms for 3.3V

Figure 8. Pull-Up Pull Down Termination

Resistor values are typically for 3.3V operation

For 2.5V operation, the resistor to ground is 62

ohms and the resistor to supply is 240 ohms

operation and 84 ohms for 2.5V operation.

The VCC6 incorporates a standard PECL output scheme, which are un-terminated emitters as shown in Figure 6. There are numerous application notes on

terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 7, and a pull-up/pull-down scheme as

shown in Figure 8. An AC coupling capacitor is optional, depending on the application and the input logic requirements of the next stage.

Vectron International • 267 Lowell Road, Suite 102, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com

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