Datasheet > VCC1-E3K-40M01

VCC1-E3K-40M01

更新时间： 2023-02-26 15:26:38

品牌	Logo	应用领域
美高森美 - MICROSEMI		/
页数	文件大小	规格书
10页	168K
描述
CMOS Output Clock Oscillator, 40.01MHz Nom,

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数据手册

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VCC1-E3K-40M01 数据手册

Performance Characteristics

Table 1. Electrical Performance, 5V option

Parameter

Symbol

Min

0.012

4.5

Typical

Maximum

125.000

5.5

Units

MHz

Frequency

f_O

V_DD

Operating Supply Voltage ¹

Absolute Maximum Supply Voltage

Supply Current, Output Enabled

<1.5 MHz

5.0

-0.7

7.0

I_DD

1.5 to 20 MHz

20.01 to 50 MHz

50.01 to 85 MHz

85.01 to 125 MHz

Supply Current, Out disabled

Output Logic Levels

I_DD

Output Logic High²

V_OH

V_OL

I_OH

I_OL

t_R/t_F

0.9*V_DD

Output Logic Low²

0.1*V_DD

Output Logic High Drive

Output Logic Low Drive

Output Rise/Fall Time²

< 1.00 MHz

200

1.0 to 20.00 MHz

20.01 to 50.00 MHz

50.01 to 125.00 MHz

Duty Cycle³(ordering option)

Operating Temperature (ordering option)

Storage Temperature

Stability⁴(ordering option)

RMS Jitter, 12kHz to 20 MHz

Period Jitter, RMS

SYM

45/55

-10/70 or -40/85

°C

ppm

-55

125

±20, ±25, ±32, ±50, ±100

0.5

2.5

Output Enable/Disable⁵

Output Enabled

4.0

Output Disabled

0.8

Internal Enable Pull-Up resistor⁵

Start-up time

100

Kohm

1. A 0.01uF and a 0.1uF capacitor should be located as close to the supply as possible (to ground) is recommended.

2. Figure 1 defines these parameters. Figure 2 illustrates the operating conditions under which these parameters are tested and

specified.

3. Symmetry is measured defined as On Time/Period.

4. Includes calibration tolerance, operating temperature, supply voltage variations, aging and shock and vibration (not under

operation).

5. Output will be enabled if enable/disable is left open.

t_R

I_DD

V_OH

50%

V_OL

.1mF

.01mF

V_DD

V _C

On Time

15pF

Period

Figure 1. Output Waveform

Figure 2. Typical Output Test Conditions (25±5°C)

Vectron International 267 Lowell Rd, Hudson NH 03051 Tel: 1-88-VECTRON-1

e-mail: vectron@vectron.com

123 4 5 6 7...10

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