(Preliminary) ABV8068/69
320-640MHz Low Phase Noise VCXO
4. General Electrical Specifications
PARAMETERS SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Supply Current,
Dynamic (with
Loaded Outputs)
Operating Voltage
IDD
PECL/LVDS
320MHz<Fout<640MHz
90/70
3.63
mA
V
VDD
2.97
@ 50% VDD (CMOS)
@ 1.25V (LVDS)
@ VDD – 1.3V (PECL)
45
45
45
50
50
50
55
55
55
Output Clock
Duty Cycle
%
Short Circuit
Current
mA
±50
5. Jitter Specifications
PARAMETERS
CONDITIONS
FREQUENCY
MIN.
TYP.
MAX.
UNITS
320.0MHz
622.08MHz
320.0MHz
0.4
0.4
3
0.5
0.6
5
Integrated jitter RMS
Period jitter RMS
Integrated 12 kHz to 20 MHz
ps
ps
With capacitive decoupling
between VDD and GND.
Over 10,000 cycles.
With capacitive decoupling
between VDD and GND.
Over 10,000 cycles.
622.08MHz
320.0MHz
622.08MHz
6
8
25
50
30
70
Period jitter Peak-to-
Peak
ps
6. Phase Noise Specifications
@10Hz @100Hz @1kHz @10kHz @100kHz
@1M
@10M
PARAMETERS
FREQ.
UNITS
Phase Noise2
relative to
carrier (typical)
320.0MHz
-59
-48
-86
-80
-116
-108
-129
-118
-124
-114
-140
-131
-148
-138
dBc/Hz
622.08MHz
Note: Phase Noise measured at VCON = 0V
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