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USB3318C-CP-TR

更新时间： 2024-01-10 18:07:46
品牌 Logo 应用领域
SMSC 电信电信集成电路
页数 文件大小 规格书
4页 234K
描述
Interface Circuit, 4 X 4 MM, 0.90 MM HEIGHT, 0.50 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, QFN-24

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中文翻译

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USB3318C-CP-TR 技术参数

生命周期：Transferred包装说明：HVQCCN,
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.77JESD-30 代码：S-XQCC-N24
长度：4 mm功能数量：1
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE座面最大高度：1 mm
标称供电电压：1.8 V表面贴装：YES
电信集成电路类型：INTERFACE CIRCUIT温度等级：INDUSTRIAL
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD宽度：4 mm
Base Number Matches：1

USB3318C-CP-TR 数据手册

 浏览型号USB3318C-CP-TR的Datasheet PDF文件第1页浏览型号USB3318C-CP-TR的Datasheet PDF文件第2页浏览型号USB3318C-CP-TR的Datasheet PDF文件第4页 
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock  
General Description  
The USB3318 is a highly integrated Hi-Speed USB 2.0 Transceiver (PHY) that supports systems  
architectures based on a 13MHz reference clock. It is designed to be used in both commercial and  
industrial temperature applications.  
The USB3318 meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device,  
or an On-the-Go (OTG) device. In addition to the supporting USB signaling the USB3318 also provides  
USB UART mode.  
USB3318 uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the  
Link. The industry standard ULPI interface uses a method of in-band signaling and status byte transfers  
between the Link and PHY, to facilitate a USB session. By using in-band signaling and status byte  
transfers the ULPI interface requires only 12 pins.  
The USB3318 uses SMSC’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-  
less” technology allows the PHY to achieve a low latency transmit and receive time. SMSC’s low  
latency transceiver allows an existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By  
adding a bridge to the ASIC the existing and proven UTMI Link IP can be reused.  
REFCLK  
CPEN  
VBUS  
ID  
Low Jitter  
Integrated  
PLL  
OTG  
RBIAS  
BIAS  
RESETB  
VBAT  
VDD33  
VDD18  
Integrated  
Power  
Management  
Hi-Speed  
USB  
Transceiver  
DP  
DM  
ULPI  
VDDIO  
Registers  
and State  
Machine  
STP  
NXT  
DIR  
ULPI Interface  
Carkit  
CLKOUT  
DATA[7:0]  
Figure 1 USB3318 Block Diagram  
The USB3318 is designed to run with a 13MHz reference clock. By using a reference clock from the  
Link the USB3318 is able to remove the cost of a crystal reference from the design.  
The USB3318 includes a integrated 3.3V LDO regulator to generate its own supply from power applied  
at the VBAT pin. The voltage on the VBAT pin can range from 3.1 to 5.5V. The regulator dropout  
voltage is less than 100mV which allows the PHY to continue USB signaling when the voltage on  
VBAT drops to 3.1V. The USB transceiver will continue to operate at lower voltages, although some  
parameters may be outside the limits of the USB specifications. If the user would like to provide a 3.3V  
supply to the USB3318, the VBAT and VDD33 pins should be connected together.  
The USB3318 also includes integrated pull-up resistors that can be used for detecting the attachment  
of a USB Charger. By sensing the attachment to a USB Charger, a product using the USB3318 can  
charge its battery at more than the 500mA allowed when charging from a USB Host.  
SMSC USB3318 REV C  
3
Revision 2.1 (06-02-10)  
PRODUCT PREVIEW  
1234

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