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URB2415D-10WR2 PDF预览

URB2415D-10WR2

更新时间: 2024-01-17 15:53:28
品牌 Logo 应用领域
金升阳 - MORNSUN /
页数 文件大小 规格书
6页 651K
描述
Analog Circuit

URB2415D-10WR2 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
包装说明:, MODULE,6LEAD,1.8Reach Compliance Code:unknown
风险等级:5.6最大输入电压:36 V
最小输入电压:9 V端子数量:6
最高工作温度:85 °C最低工作温度:-40 °C
最大输出电流:0.667 A标称输出电压:15 V
封装主体材料:PLASTIC/EPOXY封装等效代码:MODULE,6LEAD,1.8
封装形式:MICROELECTRONIC ASSEMBLY认证状态:Not Qualified
子类别:Other Analog ICs温度等级:INDUSTRIAL
Base Number Matches:1

URB2415D-10WR2 数据手册

 浏览型号URB2415D-10WR2的Datasheet PDF文件第1页浏览型号URB2415D-10WR2的Datasheet PDF文件第2页浏览型号URB2415D-10WR2的Datasheet PDF文件第3页浏览型号URB2415D-10WR2的Datasheet PDF文件第4页浏览型号URB2415D-10WR2的Datasheet PDF文件第6页 
Efficiency VS Input Voltage curve  
(Full Load)  
Efficiency VS Output Load curve  
(Vin=Vin-nominal)  
URB2405(X)D-10WR2  
URB2405(X)D-10WR2  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
9
14  
19  
24  
29  
34  
36  
5
10 20 30 40 50 60 70 80 90 100  
Input Voltage(V)  
Total Output Current (%)  
OUTLINE DIMENSIONSRECOMMENDED FOOTPRINT & PACKAGING  
MECHANICAL DIMENSIONS  
RECOMMENDED FOOTPRINT  
Ф
.150[0.059]  
(
Front View)  
5
4
3
6
Ф1.00[0.039]  
1
2
4.10[0.161]  
50.80[2.000]  
20.32[0.800]  
3
2
(
Note:grid 2.54*2.54mm.  
Bottom View)  
4
1
TUBE OUTLINE DIMENSIONS  
6
5
FOOTPRINT DETAILS  
Pin  
1
Single  
GND  
Vin  
Dual  
GND  
Vin  
2
+Vo  
+Vo  
0V  
3
13.20  
[0.520]  
54.30[2.138]  
No Pin  
0V  
4
5
-Vo  
6*  
CTRL  
CTRL  
*URA/B_XD-10WR2 series without this pin.  
Unit :mm[inch]  
General tolerances:  
L=220mm[8.661inch] Pcs/Tube:7  
±
0.50mm[ 0.020inch±]  
Note:  
Unit:mm[inch]  
Inner package dimensions: L*W*H= 255*170*80mm  
Outer package dimensions(with six inner packaging boxes):  
L*W*H= 375*280*270mm  
Pin diameter tolerances:±0.10mm[ 0.004inch±]  
Pin height tolerances:±0.50mm[ 0.020inc±h]  
General tolerances:±0.30mm[ 0.012inch±]  
TEST CONFIGURATIONS  
Input Reflected-Ripple Current Test Setup  
Input reflected-ripple current is measured with an inductor Lin and Capacitor Cin to simulate source impedance.  
Oscilloscope  
Lin  
Current  
Probe  
Load  
Cin  
DC  
DC  
Lin(4.7µH)  
Cin(220µF, ESR < 1.0Ω at 100 KHz)  
DESIGN CONSIDERATIONS  
1) Recommended circuit  
All the URA_(X)D-10WR2 & URB_(X)D-10WR2 Series have been tested according to the following recommended testing circuit before leavin  
factory (see Figure 5).  
If you want to further decrease the input/output ripple, you can increase a capacitance properly or choose capacitors with low ESR, but the  
greatest capacitance of its filter capacitor must less than the Max. Capacitive Load.  
The copyright and authority for the interpretation of the products are reserved by MORNSUN  
URA_(X)D-10WR2 & URB_(X)D-10WR2  
A/2-2012  
Page 5 of 6  

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