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UPD16640CN PDF预览

UPD16640CN

更新时间: 2024-01-24 17:54:43
品牌 Logo 应用领域
日电电子 - NEC 驱动器输出元件
页数 文件大小 规格书
16页 106K
描述
300/309-OUTPUT TFT-LCD SOURCE DRIVER 64 GRAY SCALE

UPD16640CN 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:DIE包装说明:DIE,
针数:351Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.41其他特性:DRIVER CAN ALSO OPERATE FROM 4.5V TO 5.5V
数据输入模式:PARALLEL显示模式:DOT MATRIX
接口集成电路类型:LIQUID CRYSTAL DISPLAY DRIVERJESD-30 代码:R-XUUC-N351
JESD-609代码:e0复用显示功能:NO
功能数量:1区段数:309
端子数量:351最高工作温度:75 °C
最低工作温度:-10 °C封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:RECTANGULAR
封装形式:UNCASED CHIP峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
电源电压1-最大:5.5 V电源电压1-分钟:4.5 V
电源电压1-Nom:5 V表面贴装:YES
技术:MOS温度等级:COMMERCIAL EXTENDED
端子面层:TIN LEAD端子形式:NO LEAD
端子位置:UPPER处于峰值回流温度下的最长时间:NOT SPECIFIED
最小 fmax:55 MHzBase Number Matches:1

UPD16640CN 数据手册

 浏览型号UPD16640CN的Datasheet PDF文件第2页浏览型号UPD16640CN的Datasheet PDF文件第3页浏览型号UPD16640CN的Datasheet PDF文件第4页浏览型号UPD16640CN的Datasheet PDF文件第5页浏览型号UPD16640CN的Datasheet PDF文件第6页浏览型号UPD16640CN的Datasheet PDF文件第7页 
DATA SHEET  
MOS INTEGRATED CIRCUIT  
µ
PD16640C  
300/309-OUTPUT TFT-LCD SOURCE DRIVER (64 GRAY SCALE)  
DESCRIPTION  
The µ PD16640C is a source driver for TFT-LCD 64-gray scale displays. Its logic circuit operates at 3.3 V and the  
driver circuit operates at 3.3 or 5.0 V (selectable). The input data is digital data at 6 bits x 3 dots, and 260,000 colors  
can be displayed in 64-value outputs γ-corrected by the internal D/A converter and 11 external power supplies.  
The clock frequency is 55 MHz MIN. By switching over the number of outputs between 300 and 309, the  
µ PD16640C can be used in TFT-LCD panels conforming to the SVGA/XGA standards.  
FEATURES  
CMOS level input  
sel  
sel  
Number of outputs selectable (O = H : 300 outputs, O = L : 309 outputs)  
6 bits (gray scale data) x 3 dots input  
64-value output by 11 external power supplies and internal D/A converter  
SS2  
DD2  
Output dynamic range : V + 0.1 V to V  
0.1 V  
MAX.  
DD1  
High-speed data transfer: f  
Precharge-less output buffer  
=55 MHz MIN.(internal data transfer speed when V  
= 3.0 V)  
Level of γ-corrected power supply can be inverted.  
Input data inversion function (INV)  
DD1  
Logic power supply (V ) : 3.3 V ± 0.3 V  
DD2  
sel  
Driver power supply (V ) : 3.3 V ± 0.3 V (V = H)  
sel  
5.0 V ± 0.5 V (V = L)  
ORDERING INFORMATION  
Part Number  
Package  
µ PD16640CN-xxx  
TCP (TAB package)  
Remark The TCP’s external shape is customized. To order your TCP’s external shape, please contact a NEC  
salesperson.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No. S11269EJ1V1DS00 (1st edition)  
Date Published June 1999 NS CP (K)  
Printed in Japan  
1999  
©

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