UCC2837

更新时间： 2024-01-01 01:53:37

品牌	Logo	应用领域
德州仪器 - TI		控制器
页数	文件大小	规格书
8页	89K
描述
8-Pin N-FET Linear Regulator Controller

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UCC2837 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	DIP, DIP8,.3
针数：	8	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	Factory Lead Time：	1 week
风险等级：	5.8	模拟集成电路 - 其他类型：	ANALOG CIRCUIT
JESD-30 代码：	R-PDIP-T8	长度：	9.81 mm
功能数量：	1	端子数量：	8
最高工作温度：	85 °C	最低工作温度：	-25 °C
最大输出电流：	0.5 A	最大输出电压：	12 V
最小输出电压：	1.5 V	封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP	封装等效代码：	DIP8,.3
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	认证状态：	Not Qualified
座面最大高度：	5.08 mm	子类别：	Other Analog ICs
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
技术：	BICMOS	温度等级：	OTHER
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.62 mm

UCC2837 数据手册

UCC1837

UCC2837

UCC3837

APPLICATION INFORMATION (cont.)

For the application circuit shown in Fig. 1, the voltage at

the error amplifier output will increase quickly by 400mV

due to the 40µA current through R

. The error am-

COMP

plifier will then slew at approximately 50mV per micro-

second as the 40µA charges C

COMP

From the IRL2203N data sheet, the typical required gate

voltage at room temperature, to deliver 5A is 2.6V. The

threshold for the device is approximately 1.5V. From the

gate charge curve for the IRL2203N, approximately 7nC

charge is required to change the gate voltage from 1.5V

to 2.6V. With 1.5mA gate drive current, the required time

to charge the gate is therefore 4.7µs.

UDG-97046

Overcurrent Protection and Thermal Management:

Figure 3. MOSFET turn-on characteristics.

Overcurrent protection is provided via the UCC3837’s in-

ternal current amplifier and overcurrent comparator. If at

any time the voltage across the current sense resistor

crosses the comparator threshold, the UCC3837 begins

to modulate the output driver at a 3% duty cycle. During

the 3% on time, if the current forces 140mV across the

sense amplifier, the UCC3837 will enter a constant out-

put current mode. Fig. 4 illustrates the cyclical retry of

the UCC3837 under fault conditions. Note that the initial

fault time is longer than subsequent cycles due to the

fact that the timing capacitor is completely discharged

and must initially charge to the reset threshold of 0.5V.

F_POLE

^2•π ^{• C}_IN• R_OUT

F_ZERO=F_POLE

2• π • R_COMP• C_COMP

R_COMPC_COMP

2• π • F_POLE

where C is the MOSFET input capacitance and R

the output impedance of VOUT.

OUT

The value of C

should be large enough that

COMP

parasitics connected to COMP do not effect the zero fre-

quency. A minimum of 220pF is recommended.

Transient Response

The transient performance of a linear regulator built us-

ing the UCC3837 can be predicted by understanding the

dynamics of the transient event. Consider a load tran-

sient on the application circuit of Fig. 1, where the output

current steps from a low value to a high value. Initially,

the output voltage will drop as a function of the output

capacitors ESR times the load current change. In re-

sponse to the decrease in feedback voltage at FB, the

UCC3837 error amplifier will increase its charge current

to a typical value of 40µA. The output of the amplifier will

therefore respond by first stepping the voltage propor-

tional to 40µA times R

, and then ramping up pro-

COMP

portional to 40µA and the value of C

. Dynamic

COMP

response can therefore be improved by increasing

and decreasing C

COMP

The value of VOUT will increase the same amount as the

increase in the error amplifier output. The UCC3837 out-

put gate drive current, however, is internally limited to

1.5mA. The response of the voltage at the gate of the ex-

ternal pass element is therefore a function of the 1.5mA

drive current and the external gate charge, as obtained

from the MOSFET data sheet gate charge curve.

UDG-97046

Figure 4. Load current, timing capacitor voltage and

output voltage under fault conditions.

1 2 3 456 7 8

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