UCC27444-Q1
ZHCSPQ0A –MAY 2022 –REVISED JULY 2023
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6.5 Electrical Characteristics
Unless otherwise noted, VDD = 4.5 V to 18 V, TA = TJ = –40°C to 125°C, 1-µF capacitor from VDD to GND, no load on the
output. Typical condition specifications are at 25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
BIAS CURRENTS
IVDD
IVDD
VDD static supply current
VDD static supply current
VINx = 3.3 V, ENx = VDD
150
107
380
180
uA
uA
VINx = 0 V, ENx = VDD
CLOAD = 1.8 nF, fSW = 1000 kHz, ENx = VDD, VINx = 0 V
–3.3 V PWM
IVDDO
IDIS
VDD operating current
VDD disable current
39
45
mA
uA
VINx = 3.3 V, ENx = 0 V
450
570
POWER ON RESET (POR)
VVDD_ON
VDD POR rising threshold
2.1
1.8
3.0
4.0
3.5
V
VVDD_OFF
VVDD_HYS
VDD POR falling threshold
VDD POR hysteresis
2.7
0.3
V
V
INPUT (INA, INB)
VINx_H
Input signal high threshold
Output High, ENx = HIGH
Output Low, ENx = HIGH
1.6
0.8
2.2
1.2
1
2.5
1.5
V
V
V
VINx_L
Input signal low threshold
Input signal hysteresis
VINx_HYS
ENABLE (ENA, ENB)
VENx_H
VENx_L
VENx_HYS
RENx
Enable signal high threshold Output High, INx = HIGH
1.7
1.1
2.3
1.8
0.7
100
2.7
2.2
V
V
Enable signal low threshold
Enable signal hysteresis
EN pin pullup resistance
Output Low, INx = HIGH
V
ENx = 0 V
kΩ
OUTPUTS (OUTA, OUTB)
(1)
ISRC
Peak output source current
VDD = 14 V, CVDD = 10 µF, CL = 0.1 µF, f = 1 kHz
VDD = 14 V, CVDD = 10 µF, CL = 0.1 µF, f = 1 kHz
4
A
A
(1)
(2)
ISNK
Peak output sink current
–4
IOUT = –10 mA
See 节7.3.4.
ROH
ROL
Pullup resistance
1.2
0.7
2.5
1.2
Ω
Ω
Pulldown resistance
IOUT = 10 mA
(1) Parameter not tested in production.
(2) Output pullup resistance in this table is a DC measurement that measures resistance of PMOS structure only (not N-channel
structure).
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English Data Sheet: SLUSET2