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UC563DPG4 PDF预览

UC563DPG4

更新时间： 2024-11-20 06:39:15
品牌 Logo 应用领域
德州仪器 - TI 光电二极管接口集成电路
页数 文件大小 规格书
4页 70K
描述
IC SPECIALTY INTERFACE CIRCUIT, PDSO8, POWER, SOIC-8, Interface IC:Other

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中文翻译

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UC563DPG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：8
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.84其他特性：CURRENT LIMIT AND THERMAL SHUTDOWN PROTECTION
接口集成电路类型：INTERFACE CIRCUITJESD-30 代码：R-PDSO-G8
JESD-609代码：e4长度：4.9 mm
湿度敏感等级：2功能数量：1
端子数量：8最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.75 mm
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：YES
温度等级：COMMERCIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：3.9 mm

UC563DPG4 数据手册

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SLUS169A - APRIL 1999 - REVISED NOVEMBER 2000  
DP PACKAGE  
(TOP VIEW)  
D
Complies With VME64 Standard  
D
D
2.94-V Regulated Output Voltage With 1%  
Tolerance at 25°C  
OUT  
HS/GND  
HS/GND  
N/C  
VCC  
1
2
3
4
8
7
6
5
Provides Bias for up to 32 Lines of Active  
Termination for VME busses  
HS/GND  
HS/GND  
N/C  
D
–575-mA Sourcing Current for Termination  
D
+475-mA Sinking Current for Active  
Negation Drivers  
D
D
Current Limit and Thermal Shutdown  
Protection  
Low Thermal Resistance Surface-Mount  
Packages  
description  
The VME bus bias generator provides current for up to 32 lines of active termination for a VME64 parallel bus.  
The VME standards require termination at both ends of the bus. The voltage regulator and internal logic circuits  
of these parts provide all the functionality and performance necessary to bias termination resistors for the VME  
bus. The VME bus bias generator sink current maintains regulation with all active negation drivers negated.  
Internal circuit trimming is used to trim the output voltage to a 1% tolerance. The UC563 regulator source/sink  
will provide better VME bus performance and work with active negation drivers. The regulator with resistor  
provides the bus with higher pullup current than passive termination. Other features include thermal shutdown  
and current limit for short circuit conditions. This device is available in low thermal resistance versions of the  
industry standard 8-pin power SOIC.  
block diagram  
VCC  
8
1
OUT  
≤
°
170 C  
T
J
–
+
2.94 V REFERENCE  
2
3
6
7
HEAT SINK  
UDG-99094  
GROUND PINS  
NOTE: Indicated pinout is for the 8-pin power SOIC package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234

中文翻译

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