UC3845P

更新时间： 2024-01-30 22:01:45

品牌	Logo	应用领域
德州仪器 - TI		稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管
页数	文件大小	规格书
19页	934K
描述
Current Mode PWM Controller

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技术参数
数据手册

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UC3845P 技术参数

生命周期：	Obsolete	包装说明：	DFP, FL14,.25
Reach Compliance Code：	unknown	风险等级：	5.84
Is Samacsys：	N	控制模式：	CURRENT-MODE
JESD-30 代码：	R-XDFP-F14	端子数量：	14
最高工作温度：	70 °C	最低工作温度：
最大输出电流：	0.2 A	封装主体材料：	CERAMIC
封装代码：	DFP	封装等效代码：	FL14,.25
封装形状：	RECTANGULAR	封装形式：	FLATPACK
认证状态：	Not Qualified	子类别：	Switching Regulator or Controllers
表面贴装：	YES	最大切换频率：	500 kHz
技术：	BIPOLAR	温度等级：	COMMERCIAL
端子形式：	FLAT	端子节距：	1.27 mm
端子位置：	DUAL	Base Number Matches：	1

UC3845P 数据手册

UC1842/3/4/5

UC2842/3/4/5

UC3842/3/4/5

Current Mode PWM Controller

FEATURES

DESCRIPTION

•

Optimized For Off-line And DC

To DC Converters

The UC1842/3/4/5 family of control ICs provides the necessary features to

implement off-line or DC to DC fixed frequency current mode control schemes

with a minimal external parts count. Internally implemented circuits include

under-voltage lockout featuring start up current less than 1mA, a precision

reference trimmed for accuracy at the error amp input, logic to insure latched

operation, a PWM comparator which also provides current limit control, and a

totem pole output stage designed to source or sink high peak current. The

output stage, suitable for driving N Channel MOSFETs, is low in the off state.

•

Low Start Up Current (<1mA)

Automatic Feed Forward

Compensation

•

Pulse-by-pulse Current Limiting

Enhanced Load Response

Characteristics

Differences between members of this family are the under-voltage lockout

thresholds and maximum duty cycle ranges. The UC1842 and UC1844 have

UVLO thresholds of 16V (on) and 10V (off), ideally suited to off-line

applications. The corresponding thresholds for the UC1843 and UC1845 are

8.4V and 7.6V. The UC1842 and UC1843 can operate to duty cycles

approaching 100%. A range of zero to 50% is obtained by the UC1844 and

UC1845 by the addition of an internal toggle flip flop which blanks the output

off every other clock cycle.

•

Under-voltage Lockout With

Hysteresis

•

Double Pulse Suppression

High Current Totem Pole

Output

•

Internally Trimmed Bandgap

Reference

•

500khz Operation

Low RO Error Amp

BLOCK DIAGRAM

A/B

Note 1:

Note 2:

A = DIL-8 Pin Number. B = SO-14 and CFP-14 Pin Number.

Toggle flip flop used only in 1844 and 1845.

SLUS223A - APRIL 1997 - REVISED MAY 2002

12 3 4 5 6 7...19

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