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UC1847DW

更新时间: 2024-10-02 12:16:55
品牌 Logo 应用领域
德州仪器 - TI 控制器
页数 文件大小 规格书
10页 644K
描述
Current Mode PWM Controller

UC1847DW 数据手册

 浏览型号UC1847DW的Datasheet PDF文件第2页浏览型号UC1847DW的Datasheet PDF文件第3页浏览型号UC1847DW的Datasheet PDF文件第4页浏览型号UC1847DW的Datasheet PDF文件第5页浏览型号UC1847DW的Datasheet PDF文件第6页浏览型号UC1847DW的Datasheet PDF文件第7页 
application  
INFO  
UC1846/7  
UC2846/7  
UC3846/7  
available  
Current Mode PWM Controller  
FEATURES  
DESCRIPTION  
Automatic Feed Forward Compensation  
The UC1846/7 family of control ICs provides all of the necessary  
features to implement fixed frequency, current mode control  
schemes while maintaining a minimum external parts count. The  
superior performance of this technique can be measured in im-  
proved line regulation, enhanced load response characteristics, and  
a simpler, easier-to-design control loop. Topological advantages in-  
clude inherent pulse-by-pulse current limiting capability, automatic  
symmetry correction for push-pull converters, and the ability to par-  
allel “power modules" while maintaining equal current sharing.  
Programmable Pulse-by-Pulse Current  
Limiting  
Automatic Symmetry Correction in Push-pull  
Configuration  
Enhanced Load Response Characteristics  
Parallel Operation Capability for Modular  
Power Systems  
Protection circuitry includes built-in under-voltage lockout and pro-  
grammable current limit in addition to soft start capability. A shut-  
down function is also available which can initiate either a complete  
shutdown with automatic restart or latch the supply off.  
Differential Current Sense Amplifier with  
Wide Common Mode Range  
Double Pulse Suppression  
500mA (Peak) Totem-pole Outputs  
1% Bandgap Reference  
Under-voltage Lockout  
Soft Start Capability  
Other features include fully latched operation, double pulse sup-  
pression, deadline adjust capability, and a 1% trimmed bandgap  
reference.  
The UC1846 features low outputs in the OFF state, while the  
UC1847 features high outputs in the OFF state.  
Shutdown Terminal  
500kHZ Operation  
BLOCK DIAGRAM  
5.1 V  
VIN 15  
REFERENCE  
REGULATOR  
2
VREF  
13 VC  
SYNC 10  
UVLO  
LOCKOUT  
F/F  
RT  
CT  
9
8
Q
11 A OUT  
T
OSC  
Q
UC1846  
Output Stage  
C/S-  
3
4
COMP  
0.5 V  
X3  
UC1847  
Output Inverted  
S
S
R
Q
C/S+  
14 B OUT  
+
0.5 mA  
12 GND  
NI  
5
6
E/A  
INV  
CURRENT  
LIMIT ADJUST  
1
16 SHUTDOWN  
COMP  
7
350 mV  
6 k  
UDG-02057  
SLUS352A - JANUARY 1997 - REVISED MARCH 2002  

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