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U635H16BDC25G1 PDF预览

U635H16BDC25G1

更新时间: 2024-01-25 05:22:12
品牌 Logo 应用领域
SIMTEK 静态存储器光电二极管
页数 文件大小 规格书
13页 221K
描述
Non-Volatile SRAM, 2KX8, 25ns, CMOS, PDIP24, 0.600 INCH, PLASTIC, DIP-24

U635H16BDC25G1 数据手册

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U635H16  
Nonvolatile Memory Operations  
Mode Selection  
A10 - A0  
E
W
Mode  
I/O  
Power  
Notes  
(hex)  
H
L
L
L
X
H
L
X
X
X
Not Selected  
Read SRAM  
Write SRAM  
Output High Z  
Output Data  
Input Data  
Standby  
Active  
Active  
Active  
m
H
000  
555  
2AA  
7FF  
0F0  
70F  
Read SRAM  
Read SRAM  
Output Data  
Output Data  
Output Data  
Output Data  
Output Data  
Output High Z  
k, l  
k, l  
k, l  
k, l  
k, l  
k
Read SRAM  
Read SRAM  
Read SRAM  
Nonvolatile STORE  
L
H
000  
555  
2AA  
7FF  
0F0  
70E  
Read SRAM  
Read SRAM  
Output Data  
Output Data  
Output Data  
Output Data  
Output Data  
Output High Z  
Active  
k, l  
k, l  
k, l  
k, l  
k, l  
k
Read SRAM  
Read SRAM  
Read SRAM  
Nonvolatile RECALL  
k: The six consecutive addresses must be in order listed (000, 555, 2AA, 7FF, 0F0, 70F) for a Store cycle or (000, 555, 2AA, 7FF,0F0, 70E) for  
a RECALL cycle. W must be high during all six consecutive cycles.  
See STORE cycle and RECALL cycle tables and diagrams for further details.  
The following six-address sequence is used for testing purposes and should not be used: 000, 555, 2AA, 7FF, 0F0, 39C.  
l: Activation of nonvolatile cycles does not depend on the state of G.  
m: I/O state assumes that G VIL.  
Symbol  
PowerStore  
No.  
Conditions  
Min.  
Max.  
Unit  
Power Up RECALL  
Alt.  
IEC  
24 Power Up RECALL Durationn, e  
tRESTORE  
650  
µs  
the power supply vol-  
tage must stay above  
3.6 V at least  
25 STORE Cycle Durationf  
tPDSTORE  
10  
ms  
10 ms after the start  
of the STORE opera-  
tion  
26 time allowed to Complete SRAM Cyclef, e tDELAY  
1
µs  
Low Voltage Trigger Level  
VSWITCH  
4.0  
4.5  
V
n: tRESTORE starts from the time VCC rises above VSWITCH  
.
7
April 20, 2004  

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