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TUSB1044 PDF预览

TUSB1044

更新时间: 2024-02-06 22:05:41
品牌 Logo 应用领域
德州仪器 - TI 驱动驱动器
页数 文件大小 规格书
67页 2062K
描述
USB TYPE-C™ 10Gbps 多协议双向线性转接驱动器

TUSB1044 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN,
Reach Compliance Code:compliantECCN代码:EAR99
Factory Lead Time:6 weeks风险等级:1.64
差分输出:YES驱动器位数:4
输入特性:DIFFERENTIAL接口集成电路类型:LINE TRANSCEIVER
JESD-30 代码:R-PQCC-N40JESD-609代码:e4
长度:6 mm湿度敏感等级:2
功能数量:4端子数量:40
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:RECTANGULAR封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED接收器位数:4
座面最大高度:0.8 mm最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
电源电压1-最大:3.6 V电源电压1-分钟:3 V
电源电压1-Nom:3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.4 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4 mmBase Number Matches:1

TUSB1044 数据手册

 浏览型号TUSB1044的Datasheet PDF文件第1页浏览型号TUSB1044的Datasheet PDF文件第2页浏览型号TUSB1044的Datasheet PDF文件第4页浏览型号TUSB1044的Datasheet PDF文件第5页浏览型号TUSB1044的Datasheet PDF文件第6页浏览型号TUSB1044的Datasheet PDF文件第7页 
TUSB1044  
www.ti.com.cn  
ZHCSHJ2C FEBRUARY 2018REVISED OCTOBER 2018  
5 Pin Configuration and Functions  
RNQ Package  
40-Pin (WQFN)  
Top View  
VCC  
1
28  
27  
26  
25  
24  
23  
22  
21  
VCC  
UEQ1/A1  
CFG0  
2
3
SBU1  
SBU2  
CFG1  
SWAP  
VCC  
4
5
6
7
8
AUXn  
Thermal  
Pad  
AUXp  
CTL1  
SLP_S0#  
DIR0  
CTL0/SDA  
FLIP/SCL  
Not to scale  
Pin Functions  
PIN  
NAME  
VCC  
I/O  
DESCRIPTION  
NO.  
1
P
3.3 V Power Supply  
This pin along with UEQ0 sets the high-frequency equalizer gain for upstream facing URX1, URX2, UTX1,  
UTX2 receivers. In I2C Mode, this pin will also set TUSB1044 I2C address. Refer to 9.  
2
3
4
UEQ1/A1  
CFG0  
4 Level I  
CFG0. This pin along with CFG1 will select VOD linearity range and DC gain for all the downstream and  
upstream channels. Refer to 8 for VOD linearity range and DC gain options.  
4 Level I  
4 Level I  
CFG1. This pin along with CFG0 will set VOD linearity range and DC gain for all the downstream and  
upstream channels. Refer to 8 for VOD linearity range and DC gain options.  
CFG1  
This pin swaps all the channel directions and EQ settings of downstream facing and upstream facing data  
path inputs.  
0 – Do not swap channel directions and EQ settings (Default)  
1. – Swap channel directions and EQ settings.  
2 Level I  
(PD)  
5
6
SWAP  
VCC  
P
3.3V Power Supply  
This pin when asserted low will disable Receiver Detect functionality. While this pin is low and TUSB1044  
is in U2/U3, TUSB1044 will disable LOS and LFPS detection circuitry and RX termination for both  
channels will remain enabled. If this pin is low and TTUSB1044 is in Disconnect state, the RX detect  
functionality will be disabled and RX termination for both channels will be disabled.  
0 – RX Detect disabled  
2 Level I  
(PD)  
7
8
SLP_S0#  
1 – RX Detect enabled (Default)  
This pin along with DIR1 sets the data path signal direction format. Refer to 4 for signal direction  
formats.  
0 - Source Side (DFP) Alt Mode format  
1 - Sink Side (UFP) Alt Mode format  
2 Level I  
(PD)  
DIR0  
9
URX2p  
URX2n  
Diff I/O  
Diff I/O  
Differential positive input/output for upstream facing RX2 port.  
Differential negative input/output for upstream facing RX2 port.  
10  
This pin along with DIR0 sets the data path signal direction format. Refer to 4 for signal direction  
2 Level I/O  
(PD)  
formats.  
0 - DisplayPort Alt Mode format  
1 - Custom Alt Mode format  
11  
DIR1  
Copyright © 2018, Texas Instruments Incorporated  
3

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